John Lamiet Posted January 22, 2014 Report Share Posted January 22, 2014 I read the tutorial and it makes sense, I created the DCM using the clock wizard but can't get the code to compile. I get an error "ERROR:Xst:2035 - Port <clk> has illegal connections. This port is connected to an input buffer and other components.". Does anyone know what I need to do to correct the error? Does anyone have an example of code that compiles and works?myDCM.vhd Link to comment Share on other sites More sharing options...
alex Posted January 22, 2014 Report Share Posted January 22, 2014 Inst_SegDecComp: SegDecComp PORT MAP( clk => clk, inSignal => std_logic_vector(secCounter), outAnode => anode, outSeg => segments); The highlighted part should be myClk possibly. It doesn't like that you're connecting clk to the DCM and other logic modules. If that is what you're intending to do however you can get a copy of clk from the DCM CLK0 output. Link to comment Share on other sites More sharing options...
Jack Gassett Posted January 22, 2014 Report Share Posted January 22, 2014 Yep, that looks like the culprit, and I also don't see CLKIN_IBUFG_OUT connected to anything, you probably don't want to send that out of your top level port anyway. Jack. Link to comment Share on other sites More sharing options...
John Lamiet Posted January 22, 2014 Author Report Share Posted January 22, 2014 That was absolutely the problem. Thanks very much! Link to comment Share on other sites More sharing options...
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