alex

PrimeSense nonsense

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So I bought a PrimeSense FPGA board on eBay, is anyone interested in me posting a running log of my ongoing adventures with it. I don't know what they will be, there will probably be some cursing, plenty of failures but above all, there will be plenty of hardware porn. We all like watching dirty pictures of naked PCBs right?

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Yeah you're kind of right, this is the board I posted about here under the heading "Cheap Virtex boards". This board is more like Kinect's grand-daddy. It's the development board that Kinect was born from since looking at Kinect teardown photos, the actual Kinect board is long and skinny and does not have a FPGA on it, just the custom PrimeSense PS1080 chip

 

Just a word of caution, from personal experience. If you, like me head off to ebay to buy one of these from Israel, be warned. Even though the seller posted multiple pictures of pristine looking boards, when I got it, it arrived with broken off bits (not shipping damage). I'm sorry I didn't take an actual picture but this is a photoshopped recreation of what it looked like.

 

post-29560-0-43075400-1383683883.jpg

 

EDIT: Actual picture of damaged board

 

post-29560-0-22454200-1394410637_thumb.j

 

Both bottom corners were missing complete with jagged edges, it's like someone took a pair of pliers and tore off chunks off the board. The right hand corner is the power supply section and damaging that means the entire board is useless as it won't power up. After contacting the seller and him making some lame excuse that he thought I just wanted the board for chip recovery (presumably the FPGA) he promised to replace it and was very helpful after that. He sent me multiple high res pictures of a couple of candidate replacement (whole) boards and I picked what looked like the best since both boards had other minor but fixable issues.

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I picked up one of these too, in the fine print there was mention of potentially missing parts but I was fortunate in that mine arrived with the only damage being one broken dip switch bank. IIRC these were going for $200 a while back so it seems likely that he sold all the really nice ones first, then started selling the damaged boards later. For the $100 I spent, I'm happy with what I got, but buyer beware.

 

Anyhow, the board seems to work, it powers up and I can toggle one of the LEDs with one of the buttons. I briefly tried connecting my Xilinx platform cable and was not able to get it to connect. I suspect the pinout on the JTAG header may not match that on my cable so the next step is to look into this. Should be an interesting adventure though. Looks like the FPGA used on these boards retails about $500 in single quantities for just the bare chip.

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Which JTAG did you plug into? The white JTAG connector with 2.54mm spacing pins is for the Primesense chip. Technically all the JTAG pins on that go to normal FPGA IOs then presumably are passed through to the Primesense chip JTAG interface.

 

The actual FPGA JTAG is the black connector with 2mm pin spacing (why !!!) Also what JTAG software did you use ?

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I used the black connector with the odd pin spacing. My cable came with a connector that matches but I had to pull off the black housing over the pins to make the plug fit. I've really only had a chance to plug it in and mess with it for a few minutes. Poking aorund with an ohm meter to compare the pinout with the pdf that was posted for the PrimeSense board should come up with the answers.

 

I'm using ISE Impact with a Xilinx USB cable that is probably a Chinese knockoff. It works with other FPGAs and CPLDs though. With the PrimeSense board the Vref LED on the cable doesn't turn green so it's possible that just isn't wired to the connector.

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Yep according to the schematic Vref is not connected to the JTAG header.

 

When I got my board I was initially trying to think up a way to use one of my boards, either the pipistrello's or the papilio's FTDI chip as a JTAG adapter but I couldn't see an easy way to completely disable the on board FPGA so that the FTDI chip can be connected to my Primesense, then I dug up from my junkbox a standalone JTAG adaptor I designed few years ago (basically an Amontec jtagkey tiny clone based on a FT2232D chip) and hooked it up with some custom made jumper leads like so (an BTW those red LEDs on the Primesense board are crazy bright!).

 

post-29560-0-92948300-1383902503_thumb.j

 

Initially I was trying the papilio-prog but I was getting this:

C:\Users\alex\workspace>papilio-prog.exe -v -jUsing built-in device listCannot find device having IDCODE=e5058093USB transactions: Write 4 read 3 retries 0

I couldn't explain why I was getting the e5058093 ID instead of the expected FPGA but once I tried xc3sprog the mystery was solved:

C:\Users\alex\workspace>xc3sprog\xc3sprog.exe -c ftdi -v -jXC3SPROG (c) 2004-2011 xc3sprog project $Rev: 691 $ OS: WindowsFree software: If you contribute nothing, expect nothing!Feedback on success/failure/enhancement requests:        http://sourceforge.net/mail/?group_id=170565Check Sourceforge for updates:        http://sourceforge.net/projects/xc3sprog/developUsing built-in device listUsing built-in cable listCable ftdi type ftdi VID 0x0403 PID 0x6010 dbus data 00 enable 0b cbus data 00 data 00Could not open FTDI device (using libftdi): device not foundUsing FTD2XX, Using JTAG frequency 1200000JTAG chainpos: 0 Device IDCODE = 0xe5058093     Desc: XCF16PJTAG loc.:   0  IDCODE: 0xe5058093  Desc:                         XCF16P Rev: O  IR length: 16JTAG loc.:   1  IDCODE: 0x62896093  Desc:                       XC5VLX50 Rev: G  IR length: 10USB transactions: Write 6 read 4 retries 0

The FPGA is chained in series on the JTAG bus with the platform flash which is first at ID 0 so after that I was able to synthesize a quick program to flash the LEDs on board and upload it to the board and it worked.

 

Next I though it would be nice to have Impact detect and program the board but Impact does not support the FT2232D chip, so after briefly toying with the idea of redesigning my JTAG adapter to use a FT2232H chip I realised it might be faster and cheaper to just buy a ready made JTAG adaptor. Quick search on ebay found a few cheap hits but none would specify what chipset they were using and the few that did seemed to use some micro controller, bleah.

 

Next I came across this cool mini module from FTDI that would have been perfect, but is seems all the shops that sell it will only fedex it overseas for a shipping cost more that the module alone is worth. Retarded!

 FT2232H-Mini-Module.jpg

Finally I searched for FTDI breakout modules and came across this from Dangerousprototypes which is perfect, based on a FT2232H and only $27 + $3 shipping. This is cheaper that what would cost me to spin up another custom JTAG adapter so I bought it.

 

ft2232h1_01.jpg

 

Finally bought some of these 2mm spacing 2x25 pin female connectors on ebay, only $1.88 for two of them free shipping, these are 25 pin, so bigger that the JTAG connector on the Primesense, however I can cut them to size to make a custom pinout JTAG adaptor with the board above. When all the parts arrive in the mail and I get everything soldered together I'll post a final picture of the setup.

 

mCA5j0SkY2KsXP8eIKikIDw.jpg

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I had the Xilinx platform USB cable back before I'd heard of the Papilio. I got it for working with some CPLDs and then things just kind of snowballed. I don't know why the Xilinx USB cable is such a complex device, the Altera equivalent is very simple and if you have a real parallel port the JTAG cable for Xilinx is ridiculously simple.

 

I noticed the schematic didn't show Vref connected but it has no unconnected symbol so I thought it may just be a label omission. At the time I was messing with it I was away from home and didn't have my meter on hand to check. If it really doesn't go anywhere, I can add a jumper wire to tie it to the IO voltage.

 

Yeah the red LEDs are ridiculously bright! I had to stick a bit of paper over them to look at the board without being blinded. Eventually I'll change the resistors to make them a bit more civilized.

 

Good find on those connectors, I may pick some up to make an adapter to the standard 2.5mm JTAG cable. I need to decide on the best way to connect some headers so I can connect Papilio wings or other hardware. A video DAC and audio DAC would be convenient, as well as some general IO.

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Re Papilio wings, I'm at a hacker con all weekend but I'll post something if I get the time. I have a possible (cheap-ish) suggestion I'm working on.

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Hah! Ok it works a lot better when it's turned on :)

 

I hadn't realized that one of the buttons is a power switch when I messed with it last. I turned that on and I can program the FPGA just fine now, at the moment I have a very expensive LED blinker. Now to find some time to make it do something more interesting, I guess I'll get PacMan running on it to start with.

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Yeah SW1 is the power on off switch but if you've erased the platform flash there is no indication the board is on or off as the LEDs don't change. SW2 is just a reset button.

 

So my assessment of the options for connecting accessories to the Primesense board are these.

 

Requirement: at least 48 signals to a Papilio megawing format.

 

The first obvious choice are the four Mictor connectors P5 P6 P7 P8

Pros:

  • Designed for high speed, impedance controlled etc.
  • Would give a total of 36*4 +2 = 146 signals
  • Enough pins for a megawing plus heaps of leftovers for extras, RAM, HDMI, uSD, etc
  • Provide a stable base for a daughterboard that plugs into all four of them

Cons

  • Expensive
  • Harder to route the daughterboard.
  • Expensive
  • Daugtherboard would cover the four dip switch banks when fitted
  • Did I mention expensive?

I looked on Aliexpress for Mictor connectors and I came up empty, usual suppliers like Digikey sell them for $15 EACH, so $15 times four connector times two (for the mating counterparts) = $120 + shipping

 

Closest thing I found was a couple of sellers on eBay, but they are selling only one polarity so no mating counterparts, even assuming they sold the mating connectors, extrapolating the costs would come up to $60+ for the lot, grrr.

 

The SCSI like connector P2 doesn't have enough pins.

 

The best option I think is the 53 pin J6 connector. There are 50 signals and 3 ground pins.

 

Pros:

  • Enough pins for a megawing
  • Easy routing for daughterboard
  • Cheap connectors
  • Edge location means it does not cover any board real estate.

Cons:

  • Hard to find connectors
  • Total signal length from FPGA pin to daughterboard is getting a bit on the long side, guessing over 8"
  • Not enough pins for extras

Again, they've used a seemingly very hard to find 53 pin FPC connector, even Digikey is out of stock, Aliexpress = hard to find or expensive.

 

So what I've settled for is 54 way (instead of 53 way) FPC connectors. These, seem easy to find on eBay, in fact I bought a pack of 5 of them for $3 free shipping.

 

170967977527_2.jpg

 

And a pack of 5 matching 10cm long FFCs for $10

32101341667700000004_3.jpg

So now you ask... 53 way footprint != 54 way connector. What gives? I plan to use an offset mounting on the board. Since the top three pads on the board are ground, I can mount the connector one position down, so the top pad on the board is unused then the next two ground pads line up with the top two pins on the connector, followed by 50 signal pins then the last two bottom pins on the connector line up with nothing on the board. The intention is to short these together and run a wire to the nearest 5V supply, so essentially the connector ends up with 50 signal pins and two GND pins at the top and two 5V pins at the bottom.

 

This is a mating board for a megawing that I threw together in about an hour a few days ago. It's just a quick mock up to see how everything would work out and I can change it if required as I haven't sent it out to manufacture. I'm waiting for the parts to arrive in the mail to check for fit, etc. I haven't rendered the ground plane below for clarity.

 

post-29560-0-14546400-1383979024.png

 

One additional drawback with the above is that certain wings that require differential pin pairs such as HDMI won't work on this adapter as the J6 connector was not designed with diff pairs in mind so the FPGA pins are routed to it a little random (for ease of routing).

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Yeah I haven't cleared the flash yet. Until I have a design worthy of spending some serious time on this board, it's easy enough to just JTAG it when I power it up. It would be trivial to add support for the power LED into whatever design, or just add a hard power LED at any convenient 3.3V source. That makes more sense than wasting an IO pin to drive a power LED, as if there was a shortage of IO on this thing. I did check and the power button does toggle the 3.3V regulator so it's as simple as tacking on a chip LED and resistor.

 

You've clearly put more thought into this than I have. I wasn't so worried about connecting entire megawings, but I figured I could wire up specific features like the VGA and audio DACs, joystick port, etc. I think I can do most of what I want by just using the various 2.5mm pin headers but there is a LOT of IO on that board. I think your layout looks good, my only concern would be the fragility of those ribbon cables so it would be a good idea to mechanically mount it to something. I think if one wanted to use HDMI and other fancy high speed stuff it would be better to make a custom board to connect to one of the other headers.

 

It's unfortunate those MICTOR connectors are so darn expensive. Maybe we could find a cheaper connector and make up some little adapter PCBs that would solder onto the MICTOR pads and host a cheaper more readily available connector? A thin double sided board could be reflowed in place. A board with some SRAM or something would be handy too.

 

I did get PacMan to synthesize and load onto the board but I haven't got anything rigged up to connect a monitor and see it actually run yet. From the synthesis reports, it looks like this Virtex5 is roughly 5 times the size of the Spartan6 LX9 on the Papilio Pro. Pacman uses something like 5% of the resources.

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The FPC fit is just how I imagined it, the green wire on the left goes to the +5V supply in the PSU section, then 50 signal pins followed by two ground pins on the right hand side, and one spare ground pad not connected to the FPC.

 

post-29560-0-42668100-1384320651_thumb.j

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Scroll up to my Eagle board mock up, there's a LDO on it, this way I end up with both voltages for the wings, even if most wings only use just 3v3, I thought it'd be best to have both available.

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In case anyone is interested, I ported hamster's music box to the Prime Sense board, attached is a zip with the code.

 

Porting was fairly trivial, consisting of adding a DCM to get 32 MHz from the 24 MHz oscillator on the board and changing the constraints file. As configured, this uses the switch bank SPST2 and outputs audio from pin 1 of the PS1000 JTAG header JH1. It occupies a whopping 1% of the FPGA, so there is certainly plenty of space left.

Music Box.zip

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Well it's certainly not pushing any limits with this board, I checked and the design fits with loads of room to spare in a 50k Spartan3 which is the smallest FPGA ISE even supports these days.

 

It does provide something to try out though, and it's a nice simple project that's fairly easy for me to wrap my brain around.

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So since Jack posted about bitcoin on a Papilio recently I thought I would, just for fun, try it out on my Primesense board since it requires minimal external connections. I soldered a quick JTAG adaptor cable and plugged it into my FTDI 2232H breakout board I bought off Dangerous Prototypes and hooked up another pair of cables for RS232 RX/TX to the second channel of the FTDI breakout board.

 

post-29560-0-34262600-1388405004_thumb.j

 

The JTAG cable was a success since I can program the platform flash, note that it takes over 5 minutes to erase, program and verify the flash :(

C:\Users\alex\workspace\xc3sprog>xc3sprog.exe -v -p0 -c ftdi ..\Xilinx-Serial-Miner-Virtex\build\fpgaminer_top.bitXC3SPROG (c) 2004-2011 xc3sprog project $Rev: 691 $ OS: WindowsFree software: If you contribute nothing, expect nothing!Feedback on success/failure/enhancement requests: http://sourceforge.net/mail/?group_id=170565Check Sourceforge for updates: http://sourceforge.net/projects/xc3sprog/developUsing built-in device listUsing built-in cable listCable ftdi type ftdi VID 0x0403 PID 0x6010 dbus data 00 enable 0b cbus data 00 data 00Could not open FTDI device (using libftdi): device not foundUsing FTD2XX, Using JTAG frequency 1500000 from undivided clockJTAG chainpos: 0 Device IDCODE = 0xe5058093     Desc: XCF16PErasing.............................doneErase time 14.568 sProgramming frames 0x1fffe0 to 0x1fffffProgramming BTC , CCB , SUCR , DONE finishedProgramming time 262.118 sVerifying frames 0x17f320 to 0x17f32fVerifying BTC  = 0xffffffe4Verifying CCB  = 0xffffVerifying SUCR = 0xfffcVerifying DONE = 0xccSuccess!Verify time 98.154 sUSB transactions: Write 294730 read 180068 retries 0

Or I can just upload the design to the FPGA directly, which only takes 8 seconds.

C:\Users\alex\workspace\xc3sprog>xc3sprog.exe -v -p1 -c ftdi ..\Xilinx-Serial-Miner-Virtex\build\fpgaminer_top.bitXC3SPROG (c) 2004-2011 xc3sprog project $Rev: 691 $ OS: WindowsFree software: If you contribute nothing, expect nothing!Feedback on success/failure/enhancement requests: http://sourceforge.net/mail/?group_id=170565Check Sourceforge for updates: http://sourceforge.net/projects/xc3sprog/developUsing built-in device listUsing built-in cable listCable ftdi type ftdi VID 0x0403 PID 0x6010 dbus data 00 enable 0b cbus data 00 data 00Could not open FTDI device (using libftdi): device not foundUsing FTD2XX, Using JTAG frequency 1500000 from undivided clockJTAG chainpos: 1 Device IDCODE = 0x62896093     Desc: XC5VLX50Created from NCD file: fpgaminer_top.ncd;UserID=0xFFFFFFFFTarget device: 5vlx50ff1153Created: 2013/12/31 00:53:16Bitstream length: 12556672 bitsdone. Programming time 8394.3 ms

The design runs at 96MHz (the Primesense uses a 24MHz oscillator that I quadruple via a DCM_BASIC). Running it for 15 min or so the chip gets hot but not too hot to touch. Certainly not as hot as the Pipistrello gets running at half the speed (50MHz). I slapped on a heatsink on the Virtex chip anyway and with that on, after running for an hour non stop at 96MHz, it is barely warm to the touch.

 

There are even some results produced apparently.

C:\Users\alex\workspace\Xilinx-Serial-Miner-Virtex\sources\software>miner.pyMiner started on Tue Dec 31 00:17:31 2013Block found on Tue Dec 31 00:34:16 2013Upstream result: True[1 accepted, 0 failed, 4.28 +/- 4.28 Mhash/s]Block found on Tue Dec 31 00:39:24 2013Upstream result: True[2 accepted, 0 failed, 6.54 +/- 4.63 Mhash/s]Block found on Tue Dec 31 00:50:03 2013Upstream result: True[3 accepted, 0 failed, 6.60 +/- 3.81 Mhash/s]Block found on Tue Dec 31 01:19:41 2013Upstream result: True[4 accepted, 0 failed, 4.61 +/- 2.30 Mhash/s]

 

 

 

 

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Not possible to completely unroll it. I believe the S5-VLX50 is roughly similar to a S6-LX45 in terms of resources. With LOOP_LOG2 = 2 I get over utilized resources so I can only go as low as LOOP_LOG2 = 3.

Selected Device : 5vlx50ff1153-1 Slice Logic Utilization:  Number of Slice Registers:           26109  out of  28800    90%   Number of Slice LUTs:                44453  out of  28800   154% (*)     Number used as Logic:             44092  out of  28800   153% (*)     Number used as Memory:              361  out of   7680     4%         Number used as SRL:              361    Number used as Memory:            10705  out of   7680   139% (*)         Number used as SRL:            10705

After leaving the board run over night it has settled on about 10MHash/sec

[77 accepted, 0 failed, 10.16 +/- 1.16 Mhash/s]

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Sure, resource limitation of the LX9 unfortunately. After some lengthy compile runs I can get down to basically LOOP_LOG2 = 3 for both the Pipistrello LX45 @75MHz (<-- did not run it at this freq for long as I don't have cooling for it) and the Primesense VLX50 @96MHz

 

These are frequencies that did not give failed timing constraints. The granularity I was trying was high, like 16MHz steps so it may be possible to go a bit higher but maybe not that much, Pipi failed at 90M and Prime failed at 144M, I have to retry the Prime in the range 100M-140M to see where it fails.

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I finally got around to ordering from OSHPark the expansion board I designed (see post #11 in this thread) so I can finally do a bit more than just run bitcoin on this board.

 

After running the bitcoin client on this board for like three days straight, I made a grand total of 0.00001894 BTC which at current rates is 2 cents. Woohoo, I can finally give up my day job and retire in luxury... oh wait sucker... there's no money to be made in mining using your own gear and electricity!

 

Anyway, as a consolation, here's some PCB porn again for those that like this sort of thing. These are some pics I took of the repairs and changes I did to the Primesense board when I had some time over the holidays.

 

First of was repairing some minor damage, this didn't stop the board from functioning but I figured I'd fix it up anyway. C118 and mostly C121 had sustained some force, causing C121 to almost be ripped off the board. Nothat that C117 is a 0603 size part (1.6mm x 0.8mm) and the components I had to repair were 0402 size which are only 60% the size of 0603. These things are tiny at only 1mm x 0.5mm

 

post-29560-0-03974100-1391650426.jpg

 

A metric ruler is shown to the side for comparison. These are 1mm spaces between the lines.

 

post-29560-0-47030300-1391650427.jpg

 

Below is after the repair, with 0.5mm (500 micrometers) space between ruler lines.

 

post-29560-0-56814800-1391650428.jpg

 

The next fault was a tombstone which clearly wasn't caused by abuse, this is a manufacturing defect. The component is FB1 and this means it is a ferrite bead usually used to filter the supply to another component. This quite likely meant that some other component was not getting power through this tombstoned FB1. It's possible this Primesense board might have been a manufacturing reject.

 

post-29560-0-58238100-1391650429.jpg

 

FB1 resoldered properly now.

 

post-29560-0-39114400-1391650430.jpg

 

Another ferrite bead FB3 that didn't reflow properly (or had force applied after soldering)

 

post-29560-0-08990400-1391650431.jpg

 

Fixed, note that the labels don't quite align with the components due to board space issues but the order is correct. Note that the missing components R80, R82 were not knocked off the board, they were simply not populated during manufacturing because the empty pads have a nice solder dome whereas if the components had been there and then ripped off by force, there would be an obvious dent in the solder on the pad.

 

post-29560-0-91062700-1391650431.jpg

 

Finally relocating some  components. The stereo jack J5 was no good in that place as it was connecting to the custom Primesense PS1000 chip. It was relocated to the spare J1 spot and now connects to the 16 bit Stereo sigma-delta ADC at U23. The USB connector at P3 also connected to the custom PS1000 so it was moved to position P1 and now connects to U10, a CY7C68000A USB 2.0 UTMI Transceiver. This also meant I had to move the tiny R5, TVS2 and NF2 components along to their new positions at R1, TVS1, NF1.

 

post-29560-0-10439400-1391650434_thumb.j

 

Relocated components.

 

post-29560-0-70503900-1391650435_thumb.j

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Today i came across some even smaller components while fixing an iPhone. According to wikipedia these are the current top 5 smallest standard sizes

01005 (0402 metric): 0.4 mm × 0.2 mm (0.0157 in × 0.0079 in). Typical power rating for resistors = 0.031 watt0201 (0603 metric): 0.6 mm × 0.3 mm (0.024 in × 0.012 in). Typical power rating for resistors = 0.05 watt0402 (1005 metric): 1.0 mm × 0.5 mm (0.039 in × 0.020 in). Typical power rating for resistors = 0.1 [8] or 0.062 watt0603 (1608 metric): 1.6 mm × 0.8 mm (0.063 in × 0.031 in). Typical power rating for resistors = 0.1 watt0805 (2012 metric): 2.0 mm × 1.25 mm (0.079 in × 0.049 in). Typical power rating for resistors = 0.125 watt

This would be a 01005 size:

post-29560-0-34007600-1392198857_thumb.j

 

Can you see it yet?

post-29560-0-80649700-1392198858_thumb.j

 

Zoom in and enhance

post-29560-0-70893900-1392198859_thumb.j

 

Almost there...

post-29560-0-89212200-1392198861_thumb.j

 

Would you solder this by hand?

post-29560-0-54941500-1392198863_thumb.j

 

This is ridiculous.

post-29560-0-48041300-1392198864_thumb.j

 

And this is it sitting on the ridges that form my fingerprints. Take a look at your own fingertips, can you see the lines? This is how big this component is!

post-29560-0-63135500-1392201345_thumb.j

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