FPGAExperimentor550

Variable Speed Clock

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Hello I would like to make a variable speed clock. Basic design is two push buttons and one output.

One pushbutton increase clock

Other pushbutton decreases clock

 

I am not worried about exact hz numbers just increase decrease at the moment.

 

I was wondering if anybody had a simple way of doing this.

 

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Make an accumulator, have the push buttons increment and decrement the value added to the accumulator each cycle, take the top bit of the accumulator as the clock.

This is a very simple implementation of a numerically controlled oscillator.

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     It really depends on how you want to do it. In Zap IDE or Xilinx IDE (C, verilog or VHDL) and how you want it to work with hardware (i.e. led, 7 segment or serial monitor). I worked on a bit file in Xilinx that will blink an led. If you have a papilio  pro and a logic start you can use it !clockdivider_top.bit.

     Swich 0 must be on and pressing joy select will go from 50 Hertz to about 0.4 Hertz in 8 steps. I used 2 clock dividers, 2 delays, a counter and a 8 to 1 mux.

     Zap IDE would probably be easier. Arduino Cookbook is a great place to start. Go to

http://examples.oreilly.com/0636920022244/ and download the files. Look at sections 3.2 +&- values, 5.1

switches, and 12.4 on setting up an actual clock (for the serial monitor). Arduino.cc is OK but lacks alot of details. I am not sure if the example codes can just be copy pasted into zap, but it is a start. If you get stuck just post again (and give lots of details). :) Good Luck

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