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Where to start for adding more chips to the RetroCade Synth

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I'd like to start looking into adding more chips to the RetroCade Synth.  I have had some luck implementing HDL representations of the Atari TIA chip and the 2A03 APU from the NES in a cypress PSoC device, and would like to do the same with the RetroCade Synth.

 

I have done some poking around on the forums, and from what I have seen it looks like the place to start would be to use the Papilio SOC.  In theory it looks similar to the way the Cypress PSoC creator works.  With that tool I just would create a symbol and define the I/O, then the tool would generate an HDL skeleton file with the IO defined and I just had to paste in the soundchip HDL code.  Then I could place the symbol in the schematic editor and draw the connections.  For interfacing between the micro-controller and custom peripherals there were symbols for control registers that you could wire to the HDL symbols, you would just write to the control register in the microcontroller application in order to control the peripheral.  

 

From what I can tell this is where the wishbone interface comes into play with the Papilio SOC, the details of how this interface works are not clear to me.  Can you point me towards some documentation that would help me understand how I would go about controlling new chip peripherals from the ZPUino sketch?

 

As far as the tools I would need to get started, I would need:

Papilio SOC

ISE webpack

RetroCade Installer

 

Am I missing anything?  Is there a Papilio SOC project for the RetroCade synth that I could use as a starting point?

I have seen that there is a branch of the ZPUino for RetroCade synth with the POKEY.  A perfect example would be how to create that branch from the standard RetroCade synth by using Papilio SOC.  Is Papilio SOC at a point where that would be possible?  Does what I am asking make sense?

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Hello TAG,

 

Thank you for posting and wanting to get involved, this is great timing. We've been working diligently for the last month on laying the groundwork to be able to do the things you are requesting. I've been working hard on the ZPUino documentation and just today we released the first version of what we are calling the ZAP (ZPUino Arduino Papilio) Soft Processor IDE. We've put a LOT of time into this since getting back from Design West because it is the foundation that we need so people can jump in and start doing the things you envision. ZAP is a release of our modified version of the Arduino 1.5.2 code that brings the ZPUino and AVR8 soft processors together into a single unified release. It also goes a long way towards making the ZPUino easier to use, we've linked the ZPUino bit files you need to the board types so you can just select "Burn Bootloader" and have the ZPUino Soft Processor you need loaded to the Papilio board. The ZAP IDE Quickstart has a video that shows how this works, it's much less confusing then it was before. You can also learn more about the ZPUino Soft Processor by looking at the ZPUino User Guide that I just posted.

 

So to get started I would check out the new ZAP IDE and get comfortable with loading code to the ZPUino.

 

The next sections that I intend to add to the ZPUino User Guide are a section about how to synthesize your own ZPUino variants and then how to make a Wishbone peripheral. I will be writing these sections from a VHDL perspective first and then once Papilio SOC is ready I will do the same for the schematic approach. For now, the goal is to provide a solid foundation that people can actually use, and that means cleaning, organizing, verifying, and documenting the ZPUino VHDL stuff that we currently have. Once that is done then I will be able to move forward with a new RetroCade release and the Papilio SOC system.

 

It may be a perfect opportunity for us to work together, while I am working through this you can follow along and provide feedback for what is clear and works and what holes need to be filled. I can try to stay one step ahead of you and provide the documentation and tutorials you need for your next step, with the goal of making a custom RetroCade SOC first, then adding a new Wishbone audio chip to your custom RetroCade SOC.

 

If that works then it would be great if you go through the ZAP IDE, the ZAP Quickstart Guide, and the ZPUino User Guide. Give me feedback on how it looks and what is missing and I'll start work on a tutorial on how to synthesize a custom ZPUino SOC using VHDL.

 

Jack.

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Thanks for the reply I am excited to get started with the Papilio.  The RetroCade bundle I ordered is waiting for me back home and will start once I get back in town.  I have reviewed the new documentation and things certainly seem to be getting more simple and clear.  I will keep an eye out for the next piece of the puzzle and let you know if I have questions/feedback along the way.

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I have ZAP 2.0.2 and I can get the quickstart example to work, but next I attempted to load the RetroCade Synth Sketch 1.02 from Git and the upload completes but I get a just get a blank screen on the RetroCade Synth LCD.  Does the ZAP IDE not yet support the ZPUino variant used by the RetroCade Synth sketch or is it something else?

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Hmmm, I haven't tried to load RetroCade sketch with ZAP IDE, let me give it a go.

 

Jack.

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Ok, I just uploaded RetroCade sketch using the new ZAP IDE and tracked down the problem. It looks like interrupts are not happening so the LCD interface is never updated. I will talk to Alvie tomorrow to see if we can track down where this problem is coming from.

 

Jack.

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Ok, it turns out that we accidentally committed some ZPUino 2.0 code to the 1.0 branch that messed up interrupts. We just made a fix and made a new release of the ZAP IDE. ZAP IDE 2.0.3 works with the RetroCade sketch and can be downloaded from here.

 

Sorry for the large download, Alvie is looking into an updater so there won't need to be a full download in the future.

 

Jack.

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That was my fault, sorry. The new interrupt handing for 2.0 got accidentally merged into the 1.0 area, and they are incompatible in every way.

 

The updater, yes. I've been forgeting about that mostly cause it needs a GUI, and I suck a GUI development. If anyone has interest in helping me with it (Java Swing), I certainly would appreciate :)

 

Alvie

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I'd like to get back to trying to add to the chips in the RetroCade synth.  I have seen the tutorial on synthesizing your own ZPUino variants, is the source for the ZPUino variant used in the RetroCade Synth available somewhere?

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I've started looking through the code.  First question: What is the speed of the sysclk on the wishbone bus?

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TAG,

 

Yes, 96Mhz is the correct speed for sysclk.

 

BTW, I'm really moving along with the Papilio Schematic Library and I have already managed to make a schematic based Retrocade bit file. Right now I'm just polishing things up and trying to make things as user friendly as possible. I should be making a release in the coming weeks that will allow you to make your own customized RetroCade system using the Papilio Schematic Library.

 

Keep watching, PSL is the direction that I'm heading in, I think it will make things much easier to learn and much easier to support.

 

Jack.

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Great, in the meantime I am working on getting some stuff going using the wishbone simulator.  Hopefully by the time I get something working with that I will be able to use the Schematic Library to add it in.  You'll just have to let me know how to make a symbol for a custom wishbone peripheral.

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That was easier than I thought it was going to be!  I have the NES APU implemented as a wishbone peripheral and working in the simulator.

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Excellent, if you want to make it into a symbol, its easy. Just click on the file in the Hierarchy pane and under the Processes pane expand the Design Utilities option. You will see "Create Schematic Symbol" option, just run that. After it completes you will have a symbol show up in your local symbol library. You can put it on a schematic page and then right click and choose the option to edit the symbol.

 

Oh, just remembered, you will want to pack all the wishbone signals into two vectors, its easy to do, just look at any of the wishbone peripherals I have in PSL and copy the code that packs the wishbone signals. Then generate the schematic symbol and all you will have to do is move the wishbone buses to the top of the symbol.

 

Jack.

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Ok, I am pretty close I think.  I created a symbol for the NES APU after packing the wishbone signals.  I connected it up in one of the simple audio examples replacing the existing chip, and was able to generate a bit file.  Now I am stuck at how to write registers to the wishbone peripheral from a sketch.  To start, I just want to be able to write a few registers (just like I was able to do in the simulator).  I tried looking at the example sketches to see how it is done, but I'm just not seeing where the access to the wishbone bus happens.

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Is this all I need to do to write to registers of a peripheral in wishbone slot 5?:

 

#define APU2A03BASE IO_SLOT(5)
 
void setup() {
  // put your setup code here, to run once:
REGISTER(APU2A03BASE,0)=0x3F;
REGISTER(APU2A03BASE,3)=0x03;
REGISTER(APU2A03BASE,21)=0x01;
 
 
}

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I just realized that the audio examples in the Papilio Schematic Library use the Audio Wing and I have the RetroCade Megawing.  Is there a symbol for the RetroCade Megawing yet?  If not is there a way that I can connect an Audio Wing in the schematic in such a way that will result in audio output on the necessary pins in order to get sound out of the RetroCade Megawing in the meantime?

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Is this all I need to do to write to registers of a peripheral in wishbone slot 5?:

 

#define APU2A03BASE IO_SLOT(5)
 
void setup() {
  // put your setup code here, to run once:
REGISTER(APU2A03BASE,0)=0x3F;
REGISTER(APU2A03BASE,3)=0x03;
REGISTER(APU2A03BASE,21)=0x01;
 
 
}

 

Yes, that is one way to do it, another way that might be more convenient is this:

 

#define APU2A03BASE IO_SLOT(5)
#define APU2A03REG(x) REGISTER(APU2A03BASE,x)
 
void setup() {
  // put your setup code here, to run once:
APU2A03REG(0)=0x3F;
APU2A03REG(3)=0x03;
APU2A03REG(21)=0x01;
 
 
}

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I just realized that the audio examples in the Papilio Schematic Library use the Audio Wing and I have the RetroCade Megawing.  Is there a symbol for the RetroCade Megawing yet?  If not is there a way that I can connect an Audio Wing in the schematic in such a way that will result in audio output on the necessary pins in order to get sound out of the RetroCade Megawing in the meantime?

 

I don't have a symbol setup for the RetroCade MegaWing yet, it is on the task list. In the meantime you can connect the audio output directly to the audio pins of the RetroCade.

 

Looking at the RetroCade Hardware Guide we see that the A1 jack is connected to b0 and b1. On the schematic that is equal to the IO markers Wing_BL0 and WING_BL1.

 

Here is what the schematic would look like.

post-29509-0-79781100-1386352105_thumb.p

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