afelion

Papilio Pro: Getting started?

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I've just got the board but my laptop couldn't recognize it as it does not display in `lsusb` and ./papilio-prog shows this error:


Could not access USB device 0403:6010.

 

Same error message when using Papiliio Loader in Windows. The board however has blinking led so I assume it works properly. Do I miss anything here?

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That error looks like permission errors.

 

Looks like your user does not have access to the USB bus. Which distro are you using ?

 

I assume "Same error message when using Papiliio Loader in Windows" means you're running windows inside a VM on Linux, so it's probably the same issue.

 

Alvie

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Thanks for your reply.

 

I'm using Debian Wheezy, having full access permission.

'dmesg' prints nothing when I plug the board in and the board/ftdi driver name is not shown from 'lsusb' so I don't think it is a permission issue.

 

By Windows, I mean running native Windows XP on my laptop. The Loader and driver are installed but got the same error.

 

Do I need to set a switch, button or something?

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Can you try another USB cable ?

 

Alvie

 

might be worth checking/mentioning that the jumper is seated properly/making contact properly.

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Can you try another USB cable ?

 

Alvie

 

You're right. The USB cable is dodgy.

 

Thank you all.

 

By the way, I'm a Linux enthusiast so does anyone have any advise about working with this board on Linux.

I have read that xc3sprog is more reliable than papilio-prog, isn't it?

 

Cheers

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Hello afelion,

 

papilio-prog on linux should be stable at this point, I would recommend using papilio-prog since it is a little easier to use then xc3sprog is.

 

Jack.

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Thanks, Jack

 

While trying to port my app to Spartan6 using provided ucf file from Papilio Pro, i got this error:

 

ERROR:Place:1108 - A clock IOB / BUFGMUX clock component pair have been found   that are not placed at an optimal clock IOB / BUFGMUX site pair. The clock   IOB component <clk> is placed at site <P94>. The corresponding BUFG component   <clk_BUFGP/BUFG> is placed at site <BUFGMUX_X3Y13>. There is only a select   set of IOBs that can use the fast path to the Clocker buffer, and they are   not being used. You may want to analyze why this problem exists and correct   it. If this sub optimal condition is acceptable for this design, you may use   the CLOCK_DEDICATED_ROUTE constraint in the .ucf file to demote this message   to a WARNING and allow your design to continue. However, the use of this   override is highly discouraged as it may lead to very poor timing results. It   is recommended that this error condition be corrected in the design. A list   of all the COMP.PINs used in this clock placement rule is listed below. These   examples can be used directly in the .ucf file to override this clock rule.   < NET "clk" CLOCK_DEDICATED_ROUTE = FALSE; >

Setting NET "clk" CLOCK_DEDICATED_ROUTE = FALSE; can eliminate the error but the warning is still be shown.

 

Do you know why?

 

Regards

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I don't think you want to override that clock rule by putting that setting in your ucf file.

 

If I'm reading this correctly, and I think I remember running into this somewhere before, the global buffer that you are feeding the clock into is in a different quadrant then the clock is coming in. I think you need to get to the bottom of why the BUFGMUX is being placed at BUFGMUX_X3Y13. It needs to go to one closer to where the clock is coming in.

 

If I remember back I think I ran into this problem when I was bringing in clock code that was generated for the Spartan 3E. When I used the clocking wizard to generate a new version of the clocking code it cleared that error up...

 

Jack.

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afelion: your clocking seems to be odd for an FPGA.

 

Can you send me the reports by email ? Those should be ".mrp", ".syr", and ".par". If you can, turn on verbose reporting on all of them.

 

My email is alvieboy@alvie.com .

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Thank you Jack and alvieboy

 

The issue with clock is resolved if I run the clock wizard and copy the code into my project. However, I got the same problem with other clock-like pins since I need to count how long these pins are at high/low level.

 

Where could I find source code of examples for this board?

 

Kind regards

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