AttilaTheHun

first project won't start

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I'm new to FPGA's and wanted to take the simple approach, so I bought a Papilio 250 and a MegaWing and got a copy of Mike Field's book "Introducing the Spartan 3E and VHDL". I tried the "First Project" in his book and can't get it to work. The even numbered LEDs light, but nothing ever changes state when any/all of the slide switches are toggled. I'm assuming that's what's supposed to happen.

I've rebuilt the project three times from scratch thinking that I might have entered something wrong. I get the displays shown in Mike's book.

The *.bit files are 166K as shown in Mike's book. Double clicking on the .bit file produces the following response from the loader -

Programming the FPGA - Default

JTAG chainpos: 0 Device IDCODE = 0x11c1a093 Desc: XC3S250E

Uploading "C:\downloads\Switches_LEDs.bit". Done.

Programming time 327.0 ms

USB transactions: Write 86 read 2 retries 0

I'm using Win7-32 Pro with SP1. I'm also using ISE Design Suite 14.1 rather than version 13 that Mike referenced. Any thoughts on where to proceed?

TIA,

Bruce

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Hello Bruce,

My guess here is that the wrong chip is selected in ISE Design Suite? Can you double check and make sure that a XC3S250E with vq100 footprint is selected?

You can check what chip you are using in the "Hierarchy" Pane. You should see a line that says "xc3s250e-5vq100", if it says a different chip then double click on it and change the settings.

If that is not the issue then double check the ucf file to make sure the output is going to the correct locations.

Keep us posted.

Jack

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Hi Jack,

Many thanks for the quick response! I modified the constraints.ucf file as follows -

NET switch_1 LOC = "P92" | IOSTANDARD=LVTTL;

NET switch_0 LOC = "P91" | IOSTANDARD=LVTTL;

NET LED_1 LOC = "P9" | IOSTANDARD=LVTTL;

NET LED_0 LOC = "P5" | IOSTANDARD=LVTTL;

and everything works as planned. Apparently the mappings to the pins were off. Again, many thanks for your help.

Bruce

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Hi, I think this is my fault... I've written everything assuming that LED0 is on the right, and LED7 is on the left. Silly me!

I've done it that way so when you start using counters they least significant bit is is on the left, and the most significant bit is on the right. I'll add a "Caution" sidebar to the book, and build a new PDF.

Bruce, any chance that you could verify that this is indeed the issue? I just checked the book and it does say "as you move the two rightmost slide switches the rightmost two LEDs should switch off and on" - are you using the leftmost pair?

It's a bit of an niggle, as the LEDs and switches on one board are labelled left to right, the other right to left.

I'll add a caution note...

Mike

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Made the changes - If you grab the latest version a note has been added on page 17.

If you notice anything else that needs pointing out please let me know - I've been playing with the board so much that i'm too familiar to see the obvious :-)

Oh, and congrats on getting your first project going!

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I'm also new to FPGA's. I have a Papilio One 500 and a LogicStart MegaWing. I’ve gone through the first project in Mike Field's book “Introducing the Spartan 3E and VHDL.” After multiple attempts, I still cannot get it to work.

I put “XC3S500E” in as my device type and filled out everything else as written in the book. The chip listed in the Hierarchy Pane is “xc3s500e-5vq100.” The pins I used are P3, P4, P16, and P17. Eventually, I tried copying and pasting to make sure there were no typos. I even tried using the alternative pin numbers listed above (P92, P91, P9, P5) in this thread.

I read the “Warning”in the book. Am I correct in my thinking that the reason the warning was in the book was that different switches and LEDs may be involved from what someone may expect; but that something should light up regardless?

When I first plug the USB cable into board, the even numbered LEDs flash. After I load the .BIT file on, the LEDs go out and the entire digital display lights up and stays on (i.e., 8.8.8.8.). The switches have no effect on anything that I can tell.

The .BIT file is 278KB instead of 166K as shown in Mike’s book. The loader message goes away too quickly for me to read, but I think double clicking on the .bit file produces the same response as listed by the original poster... or something close to it.

I am using Windows Vista and ISE Design Suite 14.2.

Any ideas about what I’m doing wrong? Is there a listing of different pin numbers somewhere that I should be using?

Thanks.

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Hi!

In no particular order, here are all the mistakes I've already made that could be your issue:

- Are you sure that the UCF file is a child of the VHD file? It needs to be below your top level. If it is level, remove it, then re-add it by clicking on the top VHD file.

- It is usual for the 7segs to stay dimly lit unless you code for them to be explicitly off. If they are brightly lit and you didn't design it that way then something is up with your constraints

- Have a look at the pin-out report. (In the design summary window). You should be able to see what pins have what signals associated with them. Check the the correct pins have the correct signal names

- For the larger FPGA, 278KB is the expected size

- You can check the FPGA size by reading the markings on the chip - the larger one has a 500 in it, the smaller 250.

- The whole left-to-right / right-to-left numbering of the switches and LEDs is a pain I love to inflict on others :-). When you start using the LEDs to display a signal bus having the LED7 on the left and LED0 on the right is the only way that makes sense - or at least to me!

- If all else fails, zip your project up and email it to me, and I'll point out where the oversight is (if there is one). You can choose "Clean up temp files" from the project menu before you zip it, saving lots of space

And perhaps most importantly, when you do work out what is wrong, let me know and I'll update the book to help others out.

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Thanks for the pointers and your fast response. I think I found part of the problem. The Pinout Report shows the following:

switch_0 P78

LED_0 P79

switch_1 P83

LED_1 P84

But the assignments I made in the constraints.ucf file were:

# Constraints for Papilio One

NET switch_1 LOC = "P3" | IOSTANDARD=LVTTL;

NET switch_0 LOC = "P4" | IOSTANDARD=LVTTL;

NET LED_1 LOC = "P16" | IOSTANDARD=LVTTL;

NET LED_0 LOC = "P17" | IOSTANDARD=LVTTL;

I don’t understand why the pin numbers changed. The Hierarchy view shows the .ucf file to be a child of the .vhd one.

The complete .ucf file at the end of your tutorial does not have “| IOSTANDARD=LVTTL” after the assignments. Did I do something wrong there? I haven't had a chance to try the sample project on your WIKI page yet, but I appreciate you making it available. Maybe I should attempt that next?

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I'm also new to FPGA's. I have a Papilio One 500 and a LogicStart MegaWing. I’ve gone through the first project in Mike Field's book “Introducing the Spartan 3E and VHDL.” After multiple attempts, I still cannot get it to work.

Hi, I'm new to it too and recently went through the same path, and also had trouble getting it to work with a P1-500. It seemed to me that the first time I'd done it, I tried to make the constraints file by copy&paste from the PDF, and although it looked fine and looked like the PDF version the resulting bitfile just didn't do anything. When I tried it a second time and typed all the code and text instead of copy/pasting it, it seemed to work as expected. I concluded that either there was something significant about the copy/paste (like whitespace for instance) or maybe I'd just overlooked something the first pass through (like an include, perhaps).

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I have now had success once, but I don't know what I did differently. And I haven't been able to repeat it. I'm back to getting incorrect pin assignments.

I clicked on Source in the menu bar and then Remove to remove the constraints.ucf from the project. I'm guessing the answer is no, but do I have to delete the .UCF file from the hard drive too?

What might I have done that would confuse the IDE? I seem to keep doing it.

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Here's a zipped copy of the (cleaned up) directory. It's the most recent one I did that doesn't work. I don't have a copy of the one that worked anymore.

I tested the one that you (hamster) did and it works perfectly. I'm not sure what I'm doing differently with mine.

Switches_LEDs.zip

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Hi, I'm new to it too and recently went through the same path, and also had trouble getting it to work with a P1-500. It seemed to me that the first time I'd done it, I tried to make the constraints file by copy&paste from the PDF, and although it looked fine and looked like the PDF version the resulting bitfile just didn't do anything. When I tried it a second time and typed all the code and text instead of copy/pasting it, it seemed to work as expected. I concluded that either there was something significant about the copy/paste (like whitespace for instance) or maybe I'd just overlooked something the first pass through (like an include, perhaps).

I've tried typing as opposed to copying and pasting. It doesn't seem to make a difference. I haven't seen anywhere that I'm supposed to add include statements. And the one time I got it to work, I didn't add any. The only things I can find that look close are the:

library IEEE;

use IEEE.STD_LOGIC_1164.ALL;

statements in the .VHD files. But I haven't modified those. Did I miss something?

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Hi, I had a look at your project (but I am away from my laptop so I can't build it).

There is a typo on your UCF file ("P317" vs "P17"), but looking at the reports the project is completely ignoring the UCF file - otherwise it would have errored out during the Place and Route.

I'll build it tonight.... but something is up with how you have added the UCF file.

Mike

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Success!!!

After I enter the text for the constraints.ucf file, if I save it and just hit the green arrow button, then the constraint file is not implemented.

However, the constraint file is implemented if I do the following after I save the constraints.ucf file:

Either

1. Double-click in the Processes window on “Edit Constraints (Text)”

OR

2. Highlight “Edit Constraints (Text)” in the Processes window and then click the “Run Process” button (below the green arrow button on the left)

Then

3. Click the green arrow button.

Are there other ways that make it work too?

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Congrats! Glad you it it working - that is a new one on me. I do everything just as I wrote in the book:

To add the UCF I follow these steps.

* Right-click on the top of the design

* Select "New file..."

* Choose "Implementation Constraints file", and give it a name

* double-click on the file

* type the text into the file (or more than likely cut an past from another file)

* close the UCF file (or press CTRL+S)

* double-click on "Generate Programming File" to start the build.

The only time I've had grief is when the constraints file is has not associated with the top level of the design, which sometimes happens when I do major surgery on a design.

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I just tried what you wrote, but it didn't work for me. I wonder if version 14.2 of the ISE Design Suite is different or if I'm just not understanding what you do correctly... or maybe both. Thanks for the help and moral support.

I can't say I really understand all the views in the rest of the chapter, especially the last view. I wonder if it's such a high level view that I can't see much on the larger board. Maybe that's a topic for a different thread.

Now, on to chapter 7...

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Hi Hamster,

 

Thanks for the great tutorial!  I know it's covered on the LogicStart MegaWing page (http://papilio.cc/index.php?n=Papilio.LogicStartMegaWing) but others may be experiencing symptoms similar to this thread if they're using the Papilio Pro.  It would be helpful if the tutorial were updated to have the pin mapping for the Papilio Pro.  They are:

    switch_1 (silk 6) : P120
    switch_0 (silk 7): P121
    LED_1 (silk 6): P133
    LED_0 (silk 7): P134

Also, in section 6.1, a table for the Papilio Pro would be helpful:

   Family = Spartan6
   Device = XC6SLX9
   Package = TQG144 (144 QFP (0.5mm pitch) 102 I/Os)
   Speed = -3 (this seems to work but not sure if correct)
 
Cory

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Cory,

 

I put a task on my list to update the LogicStart MegaWing page as you suggest. In the meantime, that page is a publicly editable wiki page so anyone can make any additions or changes they think will be beneficial. If you scroll to the bottom of the page you will see an "Edit Page" link. When you click on that there will be instructions for editing the wiki including the password, which should be "gadget".

 

Thanks!

Jack.

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Cory,

 

I put a task on my list to update the LogicStart MegaWing page as you suggest. In the meantime, that page is a publicly editable wiki page so anyone can make any additions or changes they think will be beneficial. If you scroll to the bottom of the page you will see an "Edit Page" link. When you click on that there will be instructions for editing the wiki including the password, which should be "gadget".

 

Thanks!

Jack.

 

Sorry for not being clear.  I was referring to the IntroToSpartanFPGABook.pdf book.  I don't think I could update that myself.  It's good to know that the MegaWing page is a wiki though.

 

Thanks,

Cory

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Actually, you could if you wanted to - all the source is up on GitHub, you just need a Linux box running ASCIIDOC to build it with.

 

Jack and I are kicking around a few ideas about a revision, and I'm thinking of making a proper "make" system, which will allow the book be built with different editions for different boards - so others could just add the board specific bit and 'roll there own' customised version.

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