geokonst 0 Report post Posted June 19, 2012 Does anybody know a way to keep IOs low while powering up, without any extra hardware? Thanks in advance! Share this post Link to post Share on other sites
Jack Gassett 0 Report post Posted June 19, 2012 The closest that I know is to disconnect HSWAP which would leave the I/O pins floating. It wouldn't be low, but would just float... You would also need to cut or lift the HSWAP pin on the FPGA which would be a pain... This is from the datasheet: A Low level applied to the HSWAP input enables pull-up resistors on user-I/O and input-only pins from power-on throughout configuration. A High level on HSWAP disables the pull-up resistors, allowing the I/Os to float. HSWAP contains a weak pull-up and defaults to High if left floating. By default I have HSWAP connected to GND which pulls all I/O up to VCC during configuration... Jack. Share this post Link to post Share on other sites
geokonst 0 Report post Posted June 20, 2012 Thanks a lot Jack. I might do that. Share this post Link to post Share on other sites
