Guest miro Report post Posted February 27, 2011 Hi, did somebody try to put this J1-Forth processor written in Verilog (200 line of code they say) running with Papilio One?? http://www.excamera.com/sphinx/fpga-j1.html Quite powerful and simple stuff, indeed. Miro. Share this post Link to post Share on other sites
Jack Gassett 0 Report post Posted February 27, 2011 Miro, This looks like an awesome project! Thanks for pointing it out, this is the first time I ever saw it. I'm going to put it on the list of things to port. I'm looking at this and the MiniSoc project. The space invaders project would be nice for the Papilio Arcade kit. Jack. Share this post Link to post Share on other sites
Guest miro Report post Posted February 28, 2011 Jack, great! This might be an evening project for an OLS verilog core contributor I would say . And a good impulse for the Papilio communinty! Just to add an uart and the "Hello world" is born. The only new stuff with J1 is the Forth language you have to compile with gforth.. M. Share this post Link to post Share on other sites
mikemayo 0 Report post Posted October 8, 2012 Has progress been made on this one?In the past I had a really nice interactive development system for motion control (disk drive servo) using Forth.I would like to create something similar using Papilio and it would help if some of the groundwork is done already...MikeM Share this post Link to post Share on other sites
ben 1 Report post Posted October 8, 2012 I did actually port the J1 processos on the Papilio, and reimplemented some of the Forth core words -- still beta, though : http://forum.gadgetfactory.net/index.php?/topic/1279-forth-on-a-papilio/ Share this post Link to post Share on other sites
