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I've been modifying the Retrocade Synth sketch to support two instances of the SID, like SID2SID, but I have not been able to locate any code on the VHDL side. After downloading the Xylinx IDE, I opened the the XISE file, and it generated (is that the right word?) a project. Looking in the results, I don't see anything relating to the SID, or the other synths. I'm guessing that I'm only half way there at this point. What am I missing? Thanks.