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Programming the flash of Papilio PRO with a new FPGA application will require erasing the flash or a part of it. My question is: How much will be erased? The entire flash or only so many blocks that the application will occupy? Or "something in between", e.g. "always 2 MBits"? Or the number of blocks occupied ny the greatest possible application for SPARTAN6, by assumption different for ...LX4 and ...LX9?