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Hi, I'm new to your platform and am interested in using the AVR8 softcore on a Nexys 4 development board that has a Xilinx Artix 7 FPGA programmed using Vivado. I've tried using the AVR Core from Opencores <https://opencores.org/project,avr_core> but first ran into problems with RAMB4_S8 not being supported past the Xilinx 6 series FPGAs. Then I had timing errors at low speeds of 4MHz and with their JTAG implementation. I noticed you've had quite a success with modifying the core for the Papilio line. Will your implementation work with an Artix 7 through the Vivado IDE? What would I need to modify in the VHDL to get it working? I'm specifically interested in using avr-gcc to compile C programs and run them on the AVR8 softcore. Any help would be greatly appreciated. Thank you, Patrick