Search the Community

Showing results for tags 'RAM ZPUIno papilio-pro'.



More search options

  • Search By Tags

    Type tags separated by commas.
  • Search By Author

Content Type


Forums

  • GadgetBox Universal IoT Hardware
    • GadgetBox General Discussion
  • Papilio Platform
    • Papilio General Discussion
    • Papilio Pro
    • Papilio One
    • Papilio DUO
    • Papilio Wings
    • DesignLab IDE
    • DesignLab Libraries
    • RetroCade Synth
    • Papilio Arcade
    • Papilio Loader Application
    • Papilio Logic Sniffer
    • Retired
  • Electronics
    • Modules
  • Soft Processors
    • ZPUino
    • J1 Forth
    • AVR8 Soft Processor
  • Community
    • Gadget Factory
    • Documentation
    • FPGA Discussions
    • Community Projects
    • Pipistrello
  • Open Bench
    • Open Bench Logic Sniffer at Dangerous Prototypes
    • OpenBench Logic Sniffer at Gadget Factory
  • Gadget Factory Internal Category

Categories

  • Papilio Platform
    • Papilio One
    • Papilio Plus
    • Papilio Wings
    • LogicStart MegaWing
    • ZPUino
    • Papilio Pro
  • Papilio Arcade
  • RetroCade Synth
  • Logic Sniffer
  • FPGAs
  • DesignLab
    • Example Projects
    • Libraries

Categories

  • Papilio FPGA
    • Papilio UCF (User Constraint) Files
    • Papilio Bit Files
  • Papilio Arcade
  • RetroCade Synth
  • General
  • Beta (Test) Releases
  • Books

Find results in...

Find results that contain...


Date Created

  • Start

    End


Last Updated

  • Start

    End


Filter by number of...

Joined

  • Start

    End


Group


AIM


MSN


Website URL


ICQ


Yahoo


Jabber


Skype


Location


Interests

Found 1 result

  1. Hi, For some real time reason i would like to give acces to one of my VHDL module to the SDRAM. I manage to do it with the SDRAM wrapper used in the ZPUino. My problem is that on papilio pro board the ZPUIno uses the 8Mb SDRAM ressource to store and run sketches. So i can not manage to share the use of the SDRAM between the core and my vhdl module. I was wondering if it was existing a way to do that ? Or may be if a configuration was existing to setup the ZPUIno to make it use the 64Kb of SRAM avalible on the LX9 chip to run sketches, and let the SDRAM free to be used by a vhdl module ? am i clear ?