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About agilmine

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  1. Hi guys, we are happy to announce the campaign is alive now on CS! we have decided to push out a developer version with 100 more GPIOs and PCIe added to the basic/miner version. please check out the campaign page for more information. and if you are interested please sign up for project updates!
  2. Hi, I am the maker of UltraMiner FPGA, I’d like to introduce you to our project, which will be launched on CrowdSupply platform soon! (please sign up for project update if interested!) Our FPGA board is designed with the latest Xilinx 16nm UltraScale+ Kintex, very high performance and power efficient. The TI PMIC (power management IC) on board is capable of supplying up to 60A constant load to the FPGA chip. It would be an ideal dev platform for any RTL designs requiring high processing power, you will never run out of logic resource or power. The Best part is the price, by cooperating with cryptocurrency mining facilities we are able to bring up the production volume so as to lower the per-unit price. The developer version is priced only at $429 I believe it is the lowest priced UltraScale+ Kintex dev board you can find in today’s market. Plus the Vivado license is for free, that saves you another $2k! Developer version: $429 (with PCIe) Crypto Miner version: $399 (bundled with CPU cooler) We promote Open Source, all the software and drivers will be open, including the cryptocurrency algorithm rtl designs, that you can use them for mining right away! Please shoot me email for any questions. I would be more than happy to answer them here as well: Technical Specifications Processing Xilinx Kintex UltraScale+ KU3P (TSMC 16nm FinFET+) System Logic Cells: 356K DSP Slices: 1,368 Memory: 26.2 Mb 125 Mhz ultra low jitter crystal Connectivity 1x Micro USB to I²C, SPI and 2xUART 1x JTAG port 1x SPI Flash (128 Mb) 1x PCIe 6-pin Power Adapter 2x GPIO pinout connectors (1528-1385-ND) 16 HPIO pins (1.8 V, higher speed, LVDS compatible) 17 HDIO pins (3.3 V, lower speed) Developer Version: PCIe x4 Gen 3 Power Management TI high efficiency PMIC with 90 W Max power output Dynamic Voltage Control and monitoring Cooler/Heatsink sockets compatible with LGA115X (90x90 mm) & North Bridge (40x40 mm) Open Source Software Free webpack license for Vivado Design Suite from Xilinx Various pre-built algorithm bitstream files included, ready to use Cryptocurrency algorithm bitstream design and host software C library provided for power monitor and management, FPGA flash programmer Cross platform support on Mac OS, Windows, Linux and Embedded Linux (Raspberry Pi)