Kelly45324

Papilio Duo. Have Windows 10, for which the only ISE available is a virtual machine that runs on Oracle VM. I can run designLab on Win 10 and it will load AVR programs, but not FPGA. I cannot figure out how ISE on the VM would communicate with the DesignLab on Win 10. I have tried that VM, and cannot seem to get it to talk to the host machine USB interface. (some kind of libftdi problem) Can run DesignLab on Win 10 - but it won't load to the FPGA/ZPUino. Ran Windows 7 as a VM - it also will not talk to the USB-just hangs during upload. Has anyone found a combination that works for Windows 10, and allows FPGA to be loaded, (even just the Duo Quickstart example)?

I had the same error with a new Papilio Duo on Windows 10, trying to load the Papilio_DUO_Quickstart Programming to SPI Flash Using devlist.txt Invalid chain position 0, position must be less than 0 (but not less than 0). Unknown Papilio Board USB transactions: Write 2 read 1 retries 0 Using devlist.txt Invalid chain position 0, position must be less than 0 (but not less than 0). IOException: Cannot open file I found the problem to be an incomplete load of the Xilinx Webpack. At the end of installation, it displays a popup Installation Complete---but it actually is not complete. You have to wait until you get a FINISHED button before pressing on. After completing a reload, the quickstart program worked as advertised.