Rob Bairos

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About Rob Bairos

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  1. Rob Bairos

    Path of least resistance for beginner..

    Could it be related to your USB chipset not recognizing that particular port for some reason? Did you rename/copy the dll's in your xilinx installation in win10? That was key for me. That and the ZPUIno image, and "MegaWing_Logicstart" sketch.
  2. Rob Bairos

    Path of least resistance for beginner..

    Hm. Can't remember what I did specifically, but I think I used usbview.exe Looking further, I remember I had to replace something in the xilinx installation folders too, if memory serves: https://www.xilinx.com/support/answers/62380.html Something about replacing one dll with another file from the installation in a couple of spots. Definitely something along those lines. Cheers, Rob
  3. Rob Bairos

    Path of least resistance for beginner..

    Which part are you stuck on? I vaguely recall some 3rd party USB utilities I used in this process.
  4. Rob Bairos

    hamster tutorial help

    Okay the first line of my ucf file I had: NET switch_1 LOC = "P120" | IOSTANDARD=LVTTL; ; #pap1 was switch (6) p3 instead of NET switch_1 LOC = "P120" | IOSTANDARD=LVTTL; #pap1 was switch (6) p3 The double "; ;" was causing a syntax error I didn't notice. I was actually downloading the previous bit file unknowingly. Downloading to SPI Flash, leaves everything working! -Rob
  5. Rob Bairos

    hamster tutorial help

    Hello. Im able to download pre made bitfiles to my Papilio Pro + LogicStart using the bitloader, and DesignLab, however, Im running into a problem trying to create a simple vhdl example from the hamster fpga ebook. Specifically, Im at section 6.4 "Downloading the Design Into the Device." Do I select FPGA or SPI Flash to download to? The screen-shot seems to imply FPGA. At any rate, the Switches_LEDs project fails to operate on the physical board as I expect. Instead when I download to SPI, 3 of the digits show "8" while one is blank. The LEDs are all off, and the switches have no effect. I did make the following changes from the tutorial for the Pro board: I set device to Spartan6 xc6slx9 tqg144 speed -2 And the constraints file is: # Constraints for Papilio Pro NET switch_1 LOC = "P120" | IOSTANDARD=LVTTL; ; #pap1 was switch (6) p3 NET switch_0 LOC = "P121" | IOSTANDARD=LVTTL; #pap1 was switch(7) p4 NET LED_1 LOC = "P133" | IOSTANDARD=LVTTL; #pap1 was led(6) p16 NET LED_0 LOC = "P134" | IOSTANDARD=LVTTL; #pap1 was led(7) p17 Above changes based on pinout chart: http://papilio.cc/index.php?n=Playground.PapilioPinouts Bit stuck for ideas, any help appreciated. Thanks.
  6. Rob Bairos

    Path of least resistance for beginner..

    Sorry, for anyone following, finally got it working. Had to select a sketch that supported both the Papilio Pro *and* the LogicStart. "MegaWing_Logicstart" was the one. That's great. Now I'll start working on some actual vhdl in the ISE. Cheers
  7. Rob Bairos

    Path of least resistance for beginner..

    Alright, so after writing this, I suspected I have to upload the ZPUino image , which this thread seems to say. I'l dig around that area.
  8. Hello. I recently got around to diving into a Papilio Pro I received about 3 years ago. I struggled through the Windows 10 issues with the missing port/usb detection and the Windows 7 Web Pack ISE crashes. Im now able to download the Papilio Pro 'hello world' bit file example, and confirms it dumps a default ascii table to a virtual COM port. I then downloaded DesignLab, but notice there's no Papilio Pro board (just the Papilo Pro / ZPUino ?) So I think Im out of luck there. I also have a LogicStart mega wing, and was hoping there was some simple precompiled bit file I could download and verify its working properly. Does such a thing exist, or do I have to manually create one with the Xilinx ISE and clips Hamsters fpga ebook? Thanks very much, Rob.