Skip

Members
  • Content count

    29
  • Joined

  • Last visited

Posts posted by Skip


  1. Thanks andY, I'll give that a try.  The web site is so badly broken I couldn't find any contact info. 

    I have read about the Tiny Synth and XFM (https://www.futur3soundz.com/) projects, but neither appear to have published their RTL code, at least I couldn't find it.

    I recently ported Greg Taylor's clone of the OPL3 to the surplus Panologic thin clients (https://github.com/skiphansen/panog1_opl3 and https://github.com/skiphansen/panog2_opl3) and I'm currently working on porting some of the RetroCade code.  The second generation Panologic device is based on a LX150 Spartan 6 and has a 24 bit capable Wolfson codec so it should be possible to make one heck of a nice synth for it.

    Skip


  2. On 1/30/2017 at 1:45 AM, offroad said:

    Hi,

    >> Pity that development appears to have really slowed down, as it is really close to being brilliant.

    the disclaimer first, I'm using SUMP only with the Pipistrello board, where I have it in flash ROM. This keeps the Papilio board free for "higher risk" stuff :-)

    Anyway: If I had to do serious work with the logic analyzer, the first thing I'd do is hijack the interface code and then write a very simple command line back-end that sets trigger conditions, start an acquisition, then dumps everything to .vcd (the file format is trivial BTW) so that it can be analyzed in GTKwave later.

    My $0.02... So far I've been lucky to get the complex issues sorted out in simulation, the logic analyzer is more like a swiss army knife (which does save the day, occasionally).

     

    Are there any command line tools or example code to setup advanced triggers?  The only program I've found that supports the advanced trigger is a Windows executable which doesn't help me since I'm running Linux.

    Skip


  3. Hi @Jack Gassett,

    I finished fixing all Benchy_Sump_LogicAnalyzer_Standalone targets and I've sent you a pull request.  I've tested the DUO bit file built from a fresh tree with the changes.  I haven't tested the other targets since I don't have hardware.

    For a while I didn't think the Papilio_One_500K target working because it appeared hang while routing, however it was just REALLY slow.

    I can understand if a smaller part takes more time to route than a larger part because it is fuller, but the 250K part routed MUCH faster!

    Any idea of what's happening here?  Is this typical?

    Skip

    Quote
    
    Papilio_One_500K: 
    ... 
    All signals are completely routed. 
    Total REAL time to PAR completion: 1 hrs 6 mins 46 secs 
    Total CPU time to PAR completion: 1 hrs 6 mins 39 secs Peak Memory Usage: 632 MB
    Peak Memory Usage:  632 MB
    ...
    
    Papilio_One_250K:
    ...
    All signals are completely routed.
    Total REAL time to PAR completion: 13 mins 39 secs 
    Total CPU time to PAR completion: 13 mins 37 secs 
    Peak Memory Usage:  612 MB
    ...
    
     

     


  4. 2 hours ago, Jack Gassett said:

    Thanks Skip, if you can send a pull request when you are ready I will merge it in.

    Do you have the fixes for the path issues too? I thought I had fixed them with the 1.0.8 release but maybe not.

    Thanks,
    Jack.

    Hi @Jack Gassett,

    I fixed all of the issues with the Benchy_Sump_LogicAnalyzer_Standalone example for the DUO ONLY.  I'll fix the other targets and then send you a pull request.

    I suspect other examples will have similar problems.  I'm going to try to do some global search and replaces to fix the issues on all of the .xise files in the examples and then test a few.  I would probably take days for my pokey machne to build all examples and targets!

    One of the biggest issues on Linux was that there was a .../examples/libraries/clocks AND a .../examples/libraries/Clocks.  I moved all of the files from ../examples/libraries/clocks into ../examples/libraries/Clocks and then deleted ../examples/libraries/clocks.  Any projects with references to the lower case clocks will now be broken on Linux, of course Windows won't care.

    Skip


  5. Hi @mkarlsson!

    I'm very new to this ... but I've been doing a LOT of reading of old posts, etc.  I happy you are still around, most of the treads I've been reading here there and everywhere seem to have gone quiet a couple of year ago.  I'm very impressed with all of the work everyone has put into OLS and related projects!

    I hadn't mentioned it, but I get garbage at 200 Mhz even without RLE.  I get good data at 100 Mhz and 20 Mhz w/o RLE which are the only other clock rates I've tried so far.  The Papilio DUO is the only hardware I have right now so I can't really tell if I have a client problem or a target problem.

    I'm going to try to port the Verilog implementation to my DUO and see how it compares.

    I  tried using pulseview briefly, but it doesn't seem to recognize my Papilio.

    Skip


  6. @Jack Gassett,

    I just succeeded in rebuilding the Benchy_Sump_LogicAnalyzer_Standalone example, but I did run into some issues.  Some issues were related to running on Linux (file system case sensitivity), some were related to references to "../../../DesignLab/build/windows/work/examples/", and some were related to an apparent reorganization of the tree structure.

    I forked DesignLab_Examples on github and committed my changes to the fork.  I'm going to take a look at the RLE stuff and see if I can contribute a fix.  Don't expect to much, I'm just learning VHDL.

    Skip

     


  7. Hi @Jack Gassett,

    After I copied ols.profile-papilio-duo.cfg from the DesignLab tree into the ols plugins directory I had some success using the ols-0.9.7.2 client from http://ols.lxtreme.nl as long as I leave Run Length Encoding disabled.  I guess my primary question at this point is if there is any reason I need to use the ols version bundled with DesignLab?

    Enabling RLE corrupts the data badly.  I'm using a bus I2C bus as a test, with RLE disabled the clock is a very nice and stable 350Khz.  When I enable RLE it looks completely different.

    Skip


  8. On 1/13/2017 at 9:55 AM, Jack Gassett said:

    If I remember correctly it should be running the Logic_Analyzer.sh script in the DesignLab-1.0.8/tools folder. Can you see if you can manually run that script? Maybe there is an issue with Java on your path?

    Jack.

    Hi Jack,

    I ran the script manually and the problem appears to be a missing dependency (missing requirement [10.0] osgi.wiring.package).  A full log of the run is attached.  This is a pretty virgin install of Ubuntu 16.04.1 LTS, I've installed it from scratch when I got my DUO and I've only been installing Papilio related tools on it.

    Skip

    Logic_Analyzer.log


  9. Hi @Jack Gassett,

    I've installed DesignLab-1.0.8 and I was able to successfully run the Papilio_DUO_QuickStart example (BTW: Way cool, no installation issues at all on Ubuntu 64 bit).

    When I click the logic analyzer icon the bit file is downloaded successfully, but the logic analyzer never starts.  No messages are displayed after the bit file is programmed.  If I say "No" to "Would you like to load a Logic Analyzer..." dialog no messages are displayed either.

    I had installed ols-0.9.7.2 that I downloaded from http://ols.lxtreme.nl prior to installing DesignLab so I tried it and it ran (sort of).  I see a 100Mhz clock on channel 1, but I can't find any configuration screens to select clocking, capture width, etc.

    Does the bit file loaded by DesignLab need to used with the DesignLab OLS client?

    This is the coolest thing I've played with in YEARS!  I've already run CP/M and Pacman on the board, I can't wait to get the logic analyzer running!

    Skip


  10. Hi @Jack Gassett,

    I've flashed the 8 channel Logic Analyzer for the Papilio DUO bit file I found in ./build/shared/tools/logicanalyzers/DUO_LX9/papilio_duo_lx9.bit successfully.  I've unplugged the Papilio and plugged it back in again, but it's only enumerating as the JTAG device, I don't see the serial port.  Do I assume correct that I should be plugging in the USB FPGA connector?  The green LED is flashing at about a 1 Hz rate.

    I'm running Ubuntu 16.04.1 LTS 64 bit.  lsusb shows:

    Quote

    skip@xenial:~/Papilio/DesignLab$ lsusb
    Bus 002 Device 004: ID 0403:7bc0 Future Technology Devices International, Ltd
    Bus 002 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub
    Bus 004 Device 003: ID 046d:c52f Logitech, Inc. Unifying Receiver
    Bus 004 Device 001: ID 1d6b:0001 Linux Foundation 1.1 root hub
    Bus 001 Device 002: ID 18e3:9106 Fitipower Integrated Technology Inc
    Bus 001 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub
    Bus 003 Device 001: ID 1d6b:0001 Linux Foundation 1.1 root hub
    Bus 006 Device 001: ID 1d6b:0003 Linux Foundation 3.0 root hub
    Bus 005 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub
    Bus 008 Device 001: ID 1d6b:0003 Linux Foundation 3.0 root hub
    Bus 007 Device 004: ID 04ca:0027 Lite-On Technology Corp.
    Bus 007 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub
    skip@xenial:~/Papilio/DesignLab$ sudo lsusb -v -d 0403:7bc0

    Bus 002 Device 004: ID 0403:7bc0 Future Technology Devices International, Ltd
    Device Descriptor:
      bLength                18
      bDescriptorType         1
      bcdUSB               2.00
      bDeviceClass            0 (Defined at Interface level)
      bDeviceSubClass         0
      bDeviceProtocol         0
      bMaxPacketSize0        64
      idVendor           0x0403 Future Technology Devices International, Ltd
      idProduct          0x7bc0
      bcdDevice            7.00
      iManufacturer           1 Gadget Factory
      iProduct                2 Papilio DUO
      iSerial                 3 100000000000
      bNumConfigurations      1
      Configuration Descriptor:
        bLength                 9
        bDescriptorType         2
        wTotalLength           55
        bNumInterfaces          2
        bConfigurationValue     1
        iConfiguration          0
        bmAttributes         0x80
          (Bus Powered)
        MaxPower              100mA
        Interface Descriptor:
          bLength                 9
          bDescriptorType         4
          bInterfaceNumber        0
          bAlternateSetting       0
          bNumEndpoints           2
          bInterfaceClass       255 Vendor Specific Class
          bInterfaceSubClass    255 Vendor Specific Subclass
          bInterfaceProtocol    255 Vendor Specific Protocol
          iInterface              2 Papilio DUO
          Endpoint Descriptor:
            bLength                 7
            bDescriptorType         5
            bEndpointAddress     0x81  EP 1 IN
            bmAttributes            2
              Transfer Type            Bulk
              Synch Type               None
              Usage Type               Data
            wMaxPacketSize     0x0200  1x 512 bytes
            bInterval               0
          Endpoint Descriptor:
            bLength                 7
            bDescriptorType         5
            bEndpointAddress     0x02  EP 2 OUT
            bmAttributes            2
              Transfer Type            Bulk
              Synch Type               None
              Usage Type               Data
            wMaxPacketSize     0x0200  1x 512 bytes
            bInterval               0
        Interface Descriptor:
          bLength                 9
          bDescriptorType         4
          bInterfaceNumber        1
          bAlternateSetting       0
          bNumEndpoints           2
          bInterfaceClass       255 Vendor Specific Class
          bInterfaceSubClass    255 Vendor Specific Subclass
          bInterfaceProtocol    255 Vendor Specific Protocol
          iInterface              2 Papilio DUO
          Endpoint Descriptor:
            bLength                 7
            bDescriptorType         5
            bEndpointAddress     0x83  EP 3 IN
            bmAttributes            2
              Transfer Type            Bulk
              Synch Type               None
              Usage Type               Data
            wMaxPacketSize     0x0200  1x 512 bytes
            bInterval               0
          Endpoint Descriptor:
            bLength                 7
            bDescriptorType         5
            bEndpointAddress     0x04  EP 4 OUT
            bmAttributes            2
              Transfer Type            Bulk
              Synch Type               None
              Usage Type               Data
            wMaxPacketSize     0x0200  1x 512 bytes
            bInterval               0
    Device Qualifier (for other device speed):
      bLength                10
      bDescriptorType         6
      bcdUSB               2.00
      bDeviceClass            0 (Defined at Interface level)
      bDeviceSubClass         0
      bDeviceProtocol         0
      bMaxPacketSize0        64
      bNumConfigurations      1
    Device Status:     0x0000
      (Bus Powered)
    skip@xenial:~/Papilio/DesignLab$

     

    Skip


  11. 1 hour ago, Jack Gassett said:

    Ah, excellent! Glad you got it worked out. :) I was actually going to dig into this but then I got sidetracked working on an update for DesignLab and the RetroCade.

    I was so excited hearing sound for the first time I didn't try to reproduce the issue before I reported back.  Later I changed SW1 to UP and I still got sound so I'm not sure what the problem was.  My joystick should come today so I hope to actually play PACMAN tonight!

    Thanks for the amazing product and seeding a great community of helpful, knowledgeable, and friendly people!

    Skip


  12. Hi @Jack Gassett,

    I'm running Pacman.bit built from the current git on my DUO/computing shield and the VGA output is working great, but there's no sound output from either jack.  Should sound be working?  I noticed that the git log comments say that pacman/DUO are untested.  Perhaps I can help with testing as I learn the platform.

    My joystick hasn't come in yet so I can't confirm a successful play, but it certainly looks like it's running.  I found the coin slot/ player select buttons are mapped to the existing push buttons...

    Skip


  13. Hi Felix,

    I figured out part of the problem.  I modified my script to use /opt/GadgetFactory/papilio-loader/programmer/bscan_spi_xc6slx9.bit instead of .../ROMVault-Papilio/papilio/bscanSPI/XC6SLX9-DUO.bit and it worked.  Interestingly there are two XC6SLX9-DUO.bit files under ROMVault-Papilio:

    Quote

    skip@xenial:~/ROMVault-Papilio$ md5sum `find . -name "*DUO*bit"`
    ec1fffb032079808c647a531daaec4d4  ./XC6SLX9-DUO.bit
    695de836cc80e9c4c4c09be3309a86a8  ./papilio/bscanSPI/XC6SLX9-DUO.bit
    skip@xenial:~/ROMVault-Papilio$ md5sum /opt/GadgetFactory/papilio-loader/programmer/bscan_spi_xc6slx9.bit
    ec1fffb032079808c647a531daaec4d4  /opt/GadgetFactory/papilio-loader/programmer/bscan_spi_xc6slx9.bit

     

    and the "other" one matches the working version.

    Skip


  14. Hi Felix,

    Well a bit closer...  I created a shell script to run the same command line and then ran it manually.  The first thing I discovered was that I didn't have permission to use the usb device.  I ran it as root and this time I get:

    Quote

    skip@xenial:~/ROMVault-Papilio$ ./e.sh
    ++ sudo ./papilio/tools/linux/papilio-prog -v -f /home/skip/ROMVault-Papilio/papilio/_tmp/processed.bit -b /home/skip/ROMVault-Papilio/papilio/bscanSPI/XC6SLX9-DUO.bit -sa -r
    Using built-in device list
    JTAG chainpos: 0 Device IDCODE = 0x24001093    Desc: XC6SLX9

    Uploading "/home/skip/ROMVault-Papilio/papilio/bscanSPI/XC6SLX9-DUO.bit". DNA is 0x5970a7db5ebd1efe
    Done.
    Programming time 503.8 ms

    Programming External Flash Memory with "/home/skROMVault-Papilioip/ROMVault-Papilio/papilio/_tmp/processed.bit".
    Uknown Flash Manufacturer (0x00)
    Error: SPI Status Register [0x00] mismatch (Wrong device or device not ready)..
    Error occured.
    USB transactions: Write 182 read 14 retries 7

     

    I probably should have mentioned earlier that auto detect isn't working, I've been selecting Papilio DUO manually.

    I built pailio-prog from current git sources when I was trying to get papilio-loader-gui to work on my 64 bit machine and it works  with papilio-loader-gui.  I changed my shell script to use that version and I got exactly the same error.

    Skip


  15. Sorry about that FELIX! Jose helped me with the Multicomp Z80 project earlier!  I got my Papilio DUO a month ago, but I hadn't had a chance to do anything with it until the holidays... now I'm in Papilio overload!

    The 64bit version of data2mem is attached.  It's not statically linked, but it doesn't appear to depend on any ISE libraries.

    Quote

    skip@xenial:~/ROMVault-PapilioEdition/ROMVault2/Stage/papilio/tools/linux$ ldd data2mem
        linux-vdso.so.1 =>  (0x00007ffc368e5000)
        libdl.so.2 => /lib/x86_64-linux-gnu/libdl.so.2 (0x00007f34afc6f000)
        libpthread.so.0 => /lib/x86_64-linux-gnu/libpthread.so.0 (0x00007f34afa52000)
        libstdc++.so.6 => /usr/lib/x86_64-linux-gnu/libstdc++.so.6 (0x00007f34af6cf000)
        libm.so.6 => /lib/x86_64-linux-gnu/libm.so.6 (0x00007f34af3c6000)
        libgcc_s.so.1 => /lib/x86_64-linux-gnu/libgcc_s.so.1 (0x00007f34af1b0000)
        libc.so.6 => /lib/x86_64-linux-gnu/libc.so.6 (0x00007f34aede6000)
        /lib64/ld-linux-x86-64.so.2 (0x000056112caba000)

    I'll update from git and let you know shortly.

    Skip

    data2mem


  16. Hi Jose,

    I had a intermediate.bit, but no processed.bit.  After enabling debug I was able to figure out that the problem was that the linux/data2mem utility was a 32bit executable, but I'm running a 64bit machine.  I copied the 64 bit version of data2mem from my ISE installation and that fixed that problem...

    Now eveything appears to work (no error messages), but the VGA output from the board is still from the last bit file I loaded. (log file attached)

    I'll comment out the code that clears the _tmp directory on completion and then try to load processed.bit manually.

    Skip

     

    log.txt