Even though the Papilio Duo hardware reference talks about having onboard CMT tiles, I don't see how to use them in ISE Webpack Design Suite 14.7. If I attempt to add an IP source and select from the FPGA features category, it says there's no support for the device when I attempt to add CMT component.
Anyone know how to access this feature using another method?
In particular I'm trying to map some sort of CLK input to my circuit design. I see P134 is mapped to the SCK on the AVR shieled MOSI pins. I've opted for that. The hardware guide also mentions there is a 32MHZ oscillator on P94, but I don't see this pin is exposed on the board pinout. Obviously I am new to FPGA and this particular board, so I'm struggling on how to map an input clock to my circuit - then, short of devising my own clock divider circuit, how to take advantage of generating other clock speeds from the base clock using the Spartan6 IP.