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About ewill

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  1. ewill

    Xilinx VHDL UART Example

    OK 9 bit example is also included with Xilinx code package. Thanks.
  2. ewill

    Xilinx VHDL UART Example

    The Uart example is very close to what I'm after for communicating with an external device I have. http://papilio.cc/index.php?n=Papilio.HighSpeedUART However I need an 11 bit frame of data and the example uses a 10 bit frame. Is there anyway the code can be modified to allow for 2 start bits and 8 data bits or 1 start bit and 9 data bits? I always need 1 stop bit regardless. I'm new to FPGAs and have poked around in the code but need a little direction to get me started. Thanks.