ayush bhat

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About ayush bhat

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  1. ayush bhat

    Hamster's SDRAM_Controller

    Or wait, are you writing ascii? my bad.
  2. ayush bhat

    Hamster's SDRAM_Controller

    Try writing full 32 bit words and then read on those specified locations? Maybe that could work
  3. ayush bhat

    Hamster's SDRAM_Controller

    Uhm, "DCBA" is a 16 bit word. "DCBA1234" would be a 32 bit word.
  4. ayush bhat

    Hamster's SDRAM_Controller

    Hi all, Thanks for your inputs! The problem was very silly. I was changing the read address BEFORE giving the read command. Once i set the read address after the read command, the problem was solved. I'm tempted to backtrack the problem and see how the address is handled in the state machine for the SDRAM controller, but im too lazy to do so
  5. ayush bhat

    Hamster's SDRAM_Controller

    Yup, i had to swap out captured_data & captured_data_last to get the right order of reads for me as well. But right now, im running a microblaze MCS to the SDRAM controller, and im doing 3 consecutive writes for testing. But when i read. i only get the most recently written data, regardless of what address i put for the read function. Any idea what could be going wrong? SDK CODE: #include <xparameters.h> #include <xiomodule.h> #include <stdbool.h> #define DELAY 2000000 /*--------------------------------------------------------------- * data_in = GPO2 * cmd_addr = GPO1 * cmd_wr = GPO3(7) * cmd_enable = GPO3(6) * cmd_byte_enable = GPO3(5 downto 2) * cmd_ready = GPI1(7) * data_out_ready = GPI1(6) * data_out = GPI2 *---------------------------------------------------------------*/ int main() { //Instantiate IOs XIOModule gpi; XIOModule gpo; u8 flags; u32 flags2; //Initialize IOs XIOModule_Initialize(&gpi, XPAR_IOMODULE_0_DEVICE_ID); XIOModule_Start(&gpi); XIOModule_Initialize(&gpo, XPAR_IOMODULE_0_DEVICE_ID); XIOModule_Start(&gpo); XIOModule_DiscreteWrite(&gpo, 3, 0); while(1) { while((flags & 0x80) != 0x80) {flags = XIOModule_DiscreteRead(&gpi, 1);}; //loop until cmd_ready = '1'; { XIOModule_DiscreteWrite(&gpo, 3, 0xFC); XIOModule_DiscreteWrite(&gpo, 1, 0b0000000000000100000000); XIOModule_DiscreteWrite(&gpo, 2, 0xAAAAFFFF); } while((flags & 0x80) != 0x80) {flags = XIOModule_DiscreteRead(&gpi, 1);}; {XIOModule_DiscreteWrite(&gpo, 3, 0xFC); XIOModule_DiscreteWrite(&gpo, 1, 0b0000000000000100000010); XIOModule_DiscreteWrite(&gpo, 2, 0x1234ABCD); } while((flags & 0x80) != 0x80) {flags = XIOModule_DiscreteRead(&gpi, 1);}; { XIOModule_DiscreteWrite(&gpo, 3, 0xFC); XIOModule_DiscreteWrite(&gpo, 1, 0b0000000000000100000100); XIOModule_DiscreteWrite(&gpo, 2, 0xA0A0F0F0); } for (u32 j=0; j<DELAY;++j); while((flags & 0x80) != 0x80) {flags = XIOModule_DiscreteRead(&gpi, 1);}; { XIOModule_DiscreteWrite(&gpo, 1, 0b1000000000000100000000); XIOModule_DiscreteWrite(&gpo, 3, 0x40); flags2 = XIOModule_DiscreteRead(&gpi, 2); xil_printf("-|%x|-\t",flags2); } for (u32 j=0; j<DELAY;++j); }; }