ssh105

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  1. sync_with_child Error

    Yup, it's ZAP 2.3.0 Maybe you can look at post #10 in this thread. I think that could be the problem. Thanks!
  2. sync_with_child Error

    Also, which directory were you referring too? There is no specific directory named "cygwin", so are you talking about the "tools" directory with all the .dll files?
  3. sync_with_child Error

    I think I may have figured out the problem. Thxe recommended editing the Makefile based on the error he got, (mine is similar) 0 [main] cp 3332 find_fast_cwd: WARNING: Couldn't compute FAST_CWD pointer. Please report this problem tothe public mailing list cygwin@cygwin.comExecuting C:\zap\papilio-zap-ide\hardware\tools\avr\bin\avr-size -A C:\Users\Hema\AppData\Local\Temp\build6786442700255138664.tmp/AVR8_Custom.cpp.hexBinary sketch size: 1,962 bytes (of a 16,384 byte maximum) - 11% usedmake: Entering directory `C:/Users/Hema/AppData/Local/Temp/build6786442700255138664.tmp' Converting Intel hex file to Verilog Mem format:./srec_cat AVR8_Custom.cpp.hex -Intel -Byte_Swap 2 -Data_Only -o tmp.mem -vmem 8./gawk ' BEGIN{FS=" ";} { $1= ""; print}' tmp.mem > out.memUsage: gawk.exe" [POSIX or GNU style options] -f progfile [--] file ...gawk.exe" [POSIX or GNU style options] [--] 'program' file ...POSIX options: GNU long options:-f progfile --file=progfile-F fs --field-separator=fs-v var=val --assign=var=val-m[fr] val-W compat --compat-W copyleft --copyleft-W copyright --copyright-W help --help-W lint --lint-W lint-old --lint-old-W posix --posix-W re-interval --re-interval-W source=program-text --source=program-text-W traditional --traditional-W usage --usage-W version --version Report bugs to bug-gnu-utils@gnu.org,with a Cc: to arnold@gnu.orgmake: *** [hex] Error 1make: Leaving directory `C:/Users/Hema/AppData/Local/Temp/build6786442700255138664.tmp'processing.app.debug.RunnerException: the selected serial port make: Leaving directory `C:/Users/Hema/AppData/Local/Temp/build6786442700255138664.tmp' does not exist or your board is not connectedat processing.app.debug.BasicUploader.uploadUsingPreferences(BasicUploader.java:159)at processing.app.Sketch.upload(Sketch.java:1678)at processing.app.Sketch.exportApplet(Sketch.java:1620)at processing.app.Sketch.exportApplet(Sketch.java:1592)at processing.app.Editor$DefaultExportHandler.run(Editor.java:2607)at java.lang.Thread.run(Thread.java:619) However the gawk commands in his makefile are different. What I found in my makefile is- $(GAWK) ' BEGIN{FS=" ";} { $$1= ""; print}' tmp.mem > out.mem I'm not really familiar with the syntax, but the error would indicate, I'm going through something similar to what he had. He made the following change to the gawk command: OLD:$(GAWK) ' BEGIN{FS=" ";} { $1= ""; print $0 > "out.mem" } ' tmp.mem NEW:./gawk ' BEGIN{FS=" ";} { $1= ""; print $0 > out.mem} ' tmp.mem If you look carefully, my makefile has a slightly different command. Can you guys help with what I should change the gawk command to to prevent the redirection that Thxe was experiencing? Thanks!
  4. sync_with_child Error

    Hi Guys, I'm having similar trouble. I'm following the same tutorial as Thxe in his first post. Also I followed his solutions, i.e. replaced the .dll file and made changes to the Makefile. But I still get the following error: 0 [main] cp 3364 find_fast_cwd: WARNING: Couldn't compute FAST_CWD pointer. Please report this problem tothe public mailing list cygwin@cygwin.comExecuting C:\papilio-zap-ide\hardware\tools\avr\bin\avr-size -A C:\Users\Hema\AppData\Local\Temp\build7792900478858895576.tmp/Papilio_QuickStart.cpp.hexBinary sketch size: 3,076 bytes (of a 16,384 byte maximum) - 18% used 0 [main] sh 5156 sync_with_child: child 2888(0x16C) died before initialization with status code 0xC0000142 14 [main] sh 5156 sync_with_child: *** child state waiting for longjmpsh.exe: fork: Resource temporarily unavailable 0 [main] sh 3408 sync_with_child: child 4788(0x170) died before initialization with status code 0xC0000142 15 [main] sh 3408 sync_with_child: *** child state waiting for longjmpsh.exe: fork: Resource temporarily unavailablemake: Entering directory `C:/Users/Hema/AppData/Local/Temp/build7792900478858895576.tmp' Converting Intel hex file to Verilog Mem format:./srec_cat Papilio_QuickStart.cpp.hex -Intel -Byte_Swap 2 -Data_Only -o tmp.mem -vmem 8./gawk ' BEGIN{FS=" ";} { $1= ""; print}' tmp.mem > out.mem 0 [main] sh 3688 sync_with_child: child 4636(0x164) died before initialization with status code 0xC0000142 14 [main] sh 3688 sync_with_child: *** child state waiting for longjmpsh.exe: fork: Resource temporarily unavailablemake: *** [hex] Error 128make: Leaving directory `C:/Users/Hema/AppData/Local/Temp/build7792900478858895576.tmp'processing.app.debug.RunnerException: the selected serial port make: Leaving directory `C:/Users/Hema/AppData/Local/Temp/build7792900478858895576.tmp' does not exist or your board is not connectedat processing.app.debug.BasicUploader.uploadUsingPreferences(BasicUploader.java:159)at processing.app.Sketch.upload(Sketch.java:1678)at processing.app.Sketch.exportApplet(Sketch.java:1620)at processing.app.Sketch.exportApplet(Sketch.java:1592)at processing.app.Editor$DefaultExportHandler.run(Editor.java:2607)at java.lang.Thread.run(Thread.java:619) Am I missing something? Other than the changes I made to the Makefile I'm simply replacing msys-1.0.dll in two file locations C:\papilio-zap-ide\hardware\tools\avr\utils\bin and C:\papilio-zap-ide\hardware\tools\papilio Do I need to do anything else?
  5. Hi, I am trying to compile the Custom Core Sketch from the tutorial here. (refer 1st video at about 4:30) The error I am getting is: 0 [main] cp 1536 find_fast_cwd: WARNING: Couldn't compute FAST_CWD pointer. Please report this problem tothe public mailing list cygwin@cygwin.comExecuting C:\papilio-zap-ide\hardware\tools\avr\bin\avr-size -A C:\Users\Hema\AppData\Local\Temp\build5889636512942399234.tmp/AVR8_Custom_User_Core.cpp.hexBinary sketch size: 388 bytes (of a 16,384 byte maximum) - 2% usedjava.lang.NullPointerExceptionat processing.app.debug.BasicUploader.uploadUsingProgrammer(BasicUploader.java:258)at processing.app.debug.BasicUploader.uploadUsingPreferences(BasicUploader.java:62)at processing.app.Sketch.upload(Sketch.java:1678)at processing.app.Sketch.exportApplet(Sketch.java:1620)at processing.app.Sketch.exportApplet(Sketch.java:1592)at processing.app.Editor$DefaultExportHandler.run(Editor.java:2607)at java.lang.Thread.run(Thread.java:619) Under boards I have selected the Papilio Custom Bit File and I am using the ZAP IDE. I've been stuck because of this since yesterday. Any advice would be helpful.
  6. Issues with srec_cat.

    i assume you guys are merging the Bootloader HEX-file and Application HEX-file
  7. Issues with srec_cat.

    Hi, Do any of you guys know how I can recreate the problem? I didn't quite get how to get the AVR 'hex' file and how to put it in the VHDL for program memory or to merge it with data2mem
  8. Hi, Yes, I'm already using the ZAP IDE. I'm aware that the Papilio IDE is an older version. However I still cannot compile code for a custom user core. I'm trying to use the code your tutorial here (see 2nd video): http://papilio.cc/index.php?n=Papilio.SimulateACustomAVR8UserCore I am unable to select the "Gadget Factory Papilio Custom Board" as required by the tutorial so I simply select "Papilio Custom Bit File" When I compile I get the following error: 0 [main] cp 788 find_fast_cwd: WARNING: Couldn't compute FAST_CWD pointer. Please report this problem to the public mailing list cygwin@cygwin.comcygwin warning: MS-DOS style path detected: C:\Users\Hema\AppData\Local\Temp\build818102754688025989.tmp Preferred POSIX equivalent is: /cygdrive/c/Users/Hema/AppData/Local/Temp/build818102754688025989.tmp CYGWIN environment variable option "nodosfilewarning" turns off this warning. Consult the user's guide for more details about POSIX paths: http://cygwin.com/cygwin-ug-net/using.html#using-pathnamesExecuting C:\papilio-zap-ide\hardware\tools\avr\bin\avr-size -A C:\Users\Hema\AppData\Local\Temp\build818102754688025989.tmp/AVR8_Custom_User_Core.cpp.hexBinary sketch size: 388 bytes (of a 16,384 byte maximum) - 2% usedjava.lang.NullPointerExceptionat processing.app.debug.BasicUploader.uploadUsingProgrammer(BasicUploader.java:258)at processing.app.debug.BasicUploader.uploadUsingPreferences(BasicUploader.java:62)at processing.app.Sketch.upload(Sketch.java:1678)at processing.app.Sketch.exportApplet(Sketch.java:1620)at processing.app.Sketch.exportApplet(Sketch.java:1592)at processing.app.Editor$DefaultExportHandler.run(Editor.java:2607)at java.lang.Thread.run(Thread.java:619)
  9. Hi, When I try to download the Papilio Arduino IDE using the link on this page: http://papilio.cc/index.php?n=Papilio.ArduinoCore it says the page is unavailable. Also when trying to simulate the AVR8 and custom user cores, I am unable to compile the C code written in the Arduino IDE. I assume it is because I cannot select the "Gadget Factory Papilio Custom Board" under Tools->Board.
  10. Hardware Verification for AVR8 Soft Core

    Hi Jack, Can you elaborate on how to use romgen? Also can you tell me more about the problem you had in your comment (#6)? To actually try and do my project, I need to generate a bad case, i.e. possibly make something not work in the VHDL code for the arduino soft core and then debug it from the simulation. Any advice would be helpful
  11. Hardware Verification for AVR8 Soft Core

    Hi, I believe the Xilinx ISE Webpack Software has a free version, so I think I can use ISIM as "freeware". I think your tutorial from here covers what to do quite well-http://www.gadgetfactory.net/2011/04/tutorial-simulate-avr8-and-custom-cores/ Thank you for the romgen source. Do you have some kind of tutorial or read me that would tell me how to use it? I'm assuming it simulates the ROM of the Arduino for the purpose of the simulation with the AVR8 core. Thanks a lot for your help thus far.
  12. Hardware Verification for AVR8 Soft Core

    Hi, Yes, I've watched the tutorial. Thank you for that by the way. It was very interesting. But what I'd really like to do is (make an attempt) at automating the process. Perhaps the first step would be to determine what would be the exploitable bugs during the verification process so that they can be detected using such a methodology. The end result would be something like what this paper is talking about - http://www.doc.ic.ac.uk/~wl/papers/11/fpt11ks.pdf They've used Verilog there. I've tried to summarize it below: They employ a two pronged approach using design and verification. In design, an application program (in our case, C code written in the Arduino IDE) will be compiled into machine code. This machine code customizes the instruction set by removing all functionality that is not used. Using the machine code as input, A Processor Generator is employed to customize a soft-processor template (in our case Verilog description of the AVR8 Soft Processor) and generate a customized soft processor design. They therefore generate an optimized system consisting of machine code+soft processor. For verification, they use the formal model of the customized processor, the corresponding machine code model and the assertions about the machine code program and verify that the execution of the machine code on the formal model of the customized processor. meets the functional specification of the high level application program. If you'd like to understand this process better, please see the diagram and content in section III of the paper.
  13. Hardware Verification for AVR8 Soft Core

    Hi Jack, Thanks for the prompt reply. Let me elaborate. I was looking for an open source method for verifying the AVR8 VHDL code. I was looking to get the VHDL verified using typical free available hardware verification tools. Our next steps will be to come up with a 'hybrid' hw/sw modeling design (e.g., using TSV sw modeling and VHDL formalism) and use the hybrid model for monitoring and intrusion detection. This way when someone writes a program in the Arduino IDE, we can verify that it both the hardware and software are going to do what they are supposed to. It can help us find bugs in the clock mismatch etc. I wanted everything to be open source and to have it automated as far as possible
  14. Hi, Do you guys know of a reliable open source method to perform hardware verification on the AVR8 Soft core? I know using the VHDL code for the AVR8 with Xilinx ISE Web pack software helps us to debug code written in the Arduino IDE, but is there a way to maybe integrate both and automate it? Thanks,