• Content count

  • Joined

  • Last visited

Community Reputation

0 Neutral

About OzieGamma

  • Rank

Profile Information

  • Gender
  1. OzieGamma

    N-Core CPU

    I am designing my CPU to run on FPGAs (trying to avoid muxes). Nop I don't care about performance, it's all about Learning how one would build and program a multi-core CPU
  2. OzieGamma

    N-Core CPU

    Thanks for the answers ! I was planning on using my own CPU (I don't care about performance, my challenge is to write a small kernel for multi-core CPUs). And was planning to use hardware message passing which shouldn't take to much space. (About 2 queues * 32 bits/word * 128 words/queue = 1KB of RAM + some logic for interrupts). OzieGamma
  3. OzieGamma

    N-Core CPU

    Hi, As I don't have my Papili DUO yet (ordered it today), I was wondering: how much of the % of the FPA is used by 1 ZPUino core ? I hope to fit at least 2 cores in the FPGA ... Thanks, OzieGamma
  4. OzieGamma

    [The] *My* Computer Science Tutorial

    Exactly what I wanted to do but in better I suppose ! I'm still going to do my own project
  5. OzieGamma

    [The] *My* Computer Science Tutorial

    Hi, First off all, I'm doing it for myself . Secondly my plan was for the tutorial to accompany my work, not the other way around. For each topic I'd have: What's the problem.How I solved it.Brief sumary of how others do it / where to find more info.Indeed compilers & co can be very complex. But they don't have too ! I'm not trying to replace gcc Regarding my CPU, the general design is done. Although I have no idea of what I can fit in the Spartan 6 LX9. The Altera FPGA I used was way bigger (it has 4,5 MB of Embedded RAM, I suppose it also has more logic cells). The ISA is an ERISC (extremely reduced instruction set). The only complicated thing is that I would like to use message-passing for multi-core support. That's how supercomputers do it and I think it is a very interesting model. NB: couldn't figure out how to quote you ...
  6. Hi everyone, I just ordered my first Papillio FPGA ! I am continuing a (huge) project that I started based on the Cyclone V GX starter kit from Terassic. I had a hard time finding documentation and support online and decided to move to Papillio. As a Computer Science Engineering student at EPFL (Switzerland), I have had numerous courses that cover various aspects of computer science/engineering. All those courses felt separated. I decided that I wanted to "fill the gaps" in my knowledge of computers. The ultimate goal is to create a tutorial / source code where one can learn practical computer engineering (I'll include links to good theory books/tutorials/articles). I want to cover the following aspects of computer science: - How the hardware works. (Simple multi/cycle multi-core CPU, no caches), VGA, Serial, keyboard, other peripherals (leds ect). - How assembly works - How a compiler works, C-like language design - How a kernel works - How to internet works, either using a computer as proxy (through UART) or if I can find an opensource Ethernet implementation directly from the FPGA. - Writing a simple web-server - Writing some basic javascript The idea is to have for each section: - Some background information - Links to deper / more complex issues (eg: caches, complex theory) - A guided practical "let's do it" I think this covers most of what one needs to know (if you add calculus ) to become a computer scientist. If anyone is interested in the project, I'd be more than happy to do work together ! I currently have: - An assembler / begining of compiler written in F# (I target mono) giving the oportunity to learn functional programming. - http://github.com/OzieGamma - Some VHDL for my CPU. You can find me online: http://beglobal.me