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About stm

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    Deisenhofen, Germany

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  1. Ok, I found an old version of the "Learn" content in the Wayback Archive, maybe it helps others as well: From there I found a video that helped me to reinstall the USB drivers in Windows 10: And now I am able to use the Papilio Duo as a logic analyzer again.
  2. Hi, my Papilio Duo has been put to rest for some years now, but now I want to reactivate it as a logic analyzer. But I forgot almost everything about how to use the Papilio Duo, and I can't find the current documentation. When I click on the "Learn" link at the top of the page, I only see an empty directory displayed by Apache. I've installed DesignLab 1.0.8 on Windows 10, and I can start the logic analyzer GUI from DesignLab, but the Papilio Duo does not show up as a serial port on the system. Where can I find the steps to get the Papilio Duo running again with my Windows 10 system? Thanks Stephan
  3. Hi Alvie and Jack, this looks very interesting! Jack, I believe you mentioned before that this project would contain a DMA module. Is this already implemented? If so, could you point out where it is so I can take a look at it? Thanks Stephan
  4. stm

    Using on-board RAM in designs

    Magnus and Vlait, thanks for the suggestions. My idea was also that it would be the easiest way to use a zpuino-based solution, with a FAT file system on the SD card. I will a look at the Pipistrello solution.
  5. stm

    Using on-board RAM in designs

    Yes, this requires clock domain crossing. The 6502 runs at 1 MHz.
  6. stm

    Using on-board RAM in designs

    I don't have any design yet, except my own previous tries to implement the DMA Wishbone peripheral where only the read cycle works (see earlier posts in this thread). The 6502 has a clock frequency of 1 MHz, so an upper bound is 1 million bytes per second, but in practice will be probably less than 500000 bytes per second as the 6502 cannot read/write on every clock cycle.
  7. stm

    Using on-board RAM in designs

    Hello Alvie, my project is a RAM expansion and floppy emulator for a 6502 board, and this means read/write random access at byte level. Do you mean a cache in connection with your burst controller? Stephan
  8. stm

    Using on-board RAM in designs

    Thank you, Jack! Please let me know when something is available. In the meantime I will try to make progress with Alvie's proposal. Stephan
  9. stm

    Using on-board RAM in designs

    Thanks Alvie, I will take a look. I only need read and write for a single byte at a time, but probably this can be tailored to my needs. Stephan
  10. stm

    Using on-board RAM in designs

    Hello Jack, I'm currently trying to revive my Papilio Duo project that I abandoned earlier this year. I still have no luck with my own DMA implementation, I can't make it work.Therefore I wanted to ask whether you actually did implement a Wishbone peripheral for SDRAM access, as you outlined in your post. Did anything happen in this area, or are you still planning to do this? Stephan
  11. Nevermind, it was in fact my own fault because I had switched on "Use external editor" in the preferences...
  12. I tried with different projects now, and DesignLab 1.0.7 does not let me edit any C source of any of my projects.
  13. Hi Jack, thanks, the messages about the duplicate references are gone after uninstalling the old instance of DesignLab. But maybe I didn't make my other problem clear: Xilinx ISE was and is installed, and it opens fine from within DesignLab 1.7. What does not work is editing the C code of the sketch itself in the DesignLab Arduino IDE (see attached screen shot). The editor window is readonly, and it doesn't allow me to edit the code. Stephan
  14. Hi, after a long pause I'm coming back to hack on my Papilio Duo, and of course I updated to the current DesignLab 1.0.7. Now I feel like a complete newbie :-) After clicking "New ZPUino SOC project" I get a new editor, but "Save as..." is disabled, and I cannot edit the sketch. When I click "Edit circuit", it tells me that there are readonly files, and then can I save the project to a new location. But after that it is still not possible to edit the sketch, What am I doing wrong. And also a general question: What is the correct way to upgrade from one DesignLab version to the next one? If I open an existing project and do "Edit Circuit", I get lots of messages about duplicate references, because there are still references to the old DesignLab directory. -- Stephan
  15. stm

    Using on-board RAM in designs

    That sounds easy, therefore good :-) For the memory expansion aspect of my project this will be fine. You might recall that exposing a part of the Papilio RAM as a memory expansion for a 6502-based computer is the first step of my project. The second step will be to use the Papilio DUO also as a floppy disk emulator with storage on an SD card. This will also need a buffer in RAM. I guess that I will then have to manage a larger chunk of memory and use part of the memory as memory expansion and another part as disk buffer. Stephan