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About eric015

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  1. eric015

    VGA Output with SDRAM as video memory possible ?

    @ Alvie : I have some C and arduino experience so i will load up the zpuino enviro for sure and see what it has got to offer ... having proper VGA support from an overgrown microcontroller is nice to have .. and i have some nice 3.3V sensors and other thingies in the drawer for playing around with that side of the board For me it will also be about studying and getting experience in VHDL.. understanding how to interface with an SDRAM controller is maybe not a good newbie project..... - So i will wait for what you guys come up with and and in the mean time i will do tests and learn .. starting as soon as it arrives .. Grx.. Eric
  2. eric015

    VGA Output with SDRAM as video memory possible ?

    Hi Jack, Sounds promising .... I will have to wait for some days for the delivery anyway .. so .. hopefully things come together .. I look forward to setting my teeth in this .. - thanks for your prompt reply .. Grx.. Eric
  3. Hi, I am new to the papilio enviro and to FPGA's ... (still expecting the 1st delivery) In good preparation of my plans with this device I studied alot opn the subject for a few weeks now and and read around in the existing forums. I started messing with VHDL in xilinx ISE .. The concept of FPGA's has attracted me much, but off course there is a lot to learn still .. I was wondering if it would be possible to used these wonderful 8 megs of SDRAM as video memory for VGA output .. ? If yes ... is it then possible to spilt it up and use the leftover as system RAM for some processor soft core (i was thinking of the 65816 because i have a past in that family) ? Or even better like putting it all in one flat address map where the soft core processor can manipulate the video memory direct random adressable ? I understand that access is limited by time slots .. but in burst modes you can do bulk transfers at high speeds .. but there must be alignment with read and write actions between the constant data refresh cycles ... I have seen the modules for testing the sdram .. but diving into that project in ISE is not a good start for beginners maybe since i did not really find a clear interface how to talk to the SDRAM controller module and translating it somehow into a flat always accesible way like the way you use SRAM.... Are there any experts who can elaborate a little more on this ? Grx.. Eric