F6EEQ

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About F6EEQ

  • Rank
    Advanced Member
  • Birthday 12/08/1950

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  • Gender
    Male
  • Location
    Romans (Drome, France)
  • Interests
    Ham Radio and electronic stuff.
    Gardening, hiking, riding bicycle
  1. Funny enough, but the LED's have 330 ohms limiting resistors, but not the 7 segment., at least this is what I see on the Megawing schematic.. I checked the 7 segment notice, so it is said 20 mA, and 2.1 V typical, but nothing about a limiting resistor, which is always good to have in my opinion. I don't know why Jack did not provide these... Anyway, when I use a LED (anyone) with an ARDUINO, it is always safe to have a limiting resistor (330 ohms if you wish a bright glow, but 1 k should do the trick). More important: ARDUINO provides 3.3 or 5 V, so be sure not to overload the Megawing! Have fun. Gerard.
  2. Hi all, I have 2 question about 7 segments on Logic start Megawing: First: some segments are always "on", even if I do not use them (not always the same). I suppose that the FPGA pins are in some "random" state and that this could give some lighted segments. Also to light the segments, the anodes must be in a "high" state. I could switch them off in the code, but this is not a very elegant solution. Is it possible (for instance in the UCF file) to declare these pins as logical zero, or to say that the anodes (AN0...AN3) are to ground, so as to block the +3.3V supply? Second: in the schematics, the decimal points are on the bus and appear on the pins. But the colon and Apos are on the bus but do not appear on pins. Is there a possibility to light them? Thanks a lot for your help. Gerard.
  3. F6EEQ

    Driving small TFTs

    Seems nice, but I've been unable to open the link.... Which soft could open it?? Thanks Gerard.
  4. F6EEQ

    HD44780 interface

    Hi, I'm back on Papilio and I would like ti interface with a LCD to be able to follow what is going on. Easy to do with PIC or ARDUINO, but not so much with FPGA. I browsed the web (FPGA4fun for instance or Hamsterworks) but did not find any usable tutorial. I do not wish to go with ZPuino or the like, but pure FPGA things. Playground did not provide any help on this matter either, although there is a LCD on the retro wing. Could some one help me? I'm not looking for a ready-to-go project ( butit could help) but rather some educated hints on how to proceed. Thanks in advance. Gerard.
  5. F6EEQ

    Xilinx ISE on Linux

    This confirm what I thought. Well.. It seems, I'll have to switch again to W, at least for FPGA!! Thanks and have a nice WE
  6. F6EEQ

    Xilinx ISE on Linux

    Thanks, but this download is > 5Go... . With my very poor DSL I'll need a week!! I tried Vivado, which is lighter, but was unable to install it on Debian because of Java problems...
  7. F6EEQ

    Xilinx ISE on Linux

    Hi all, I'm back after a long time (1 or 2 years??), but I would like to restart with FPGA. I have a Papilio pro, and I used it with Xilinx ISE with W10. It was working well, but now I wish to have it on Linux (Debian). I have the CD's, but it seems that these CD are only for Windows. Does anyone have experience with installing ISE on Linux? I'm not sure it is the good place to post, but I did not find any "general" forum tab. Thanks for your help. Gerard
  8. F6EEQ

    Trouble with simulation

    OK Jack and thanks. Now it's working. Not as I wanted, but this is another story!! At least I get some time frame and the clock ISE help is not very helpful in setting up all those things! Have a nice WE.
  9. F6EEQ

    Trouble with simulation

    OK Jack, but I tried and could not find where Isim is in the Xilinx directory. The line "Model Tech Simulator" is blank and if I click on "default", nothing's happening. I'm not sure that Isim has been downloaded with ISE.
  10. Hi all,, I tried to use simulation, using the guidelines in Hamsters book. I have the test bench OK, but when I double click on "sumulate", I get an error message saying: "model technlogy vsim unavailable". When I go in "preference/tools" the first line is blanck, and I am not able to find the path to the simulator. I'm not sure it is installed. Any hints? Thanks.
  11. F6EEQ

    Always questions about wishbone!!

    Wouah!!! Long reading with lot of interesting stuff! I will try to go through this during the WE. Thanks for help, and be assured tha t i will annoy you another time
  12. Hi all, Seems that I really do not understand and hopefully some great guru will explain. I read carefully the small ZPU codenamed "ZpuQuadDec" which I found elsewhere in the Showcase section. In the "zpuino_quadcounter" VHDL file there is the description of the wishbone in the "entity" part, and then further in the code, some of the wishbone bits or vectors are used. Output of the decoder (direction of rotation) is written in the WB_DATA_O vector, and some other bits are used to control the flow. I understand the logic of the VHDL code, but what I could not figure is how to retrieve in the "microprocessor" the WB_DATA_O value. I read carefully the ZPUINO-1 book written by Alvie, but I was unable to understand the link between the wishbone and the GPIO port, which is where I suppose the data are read/written. When you write a C code with the ARDUINO IDE, you use PPS and the other functions related to port definition, but this implies to define the pin you arec working with. Here in the VHDL code, I did not find any mention of pin or the like. May be I'm completely wrong, but the least I can say is that I'm lost :wacko: Could someone give me some explanation and/or a simple example ? Thanks for your patience and help.
  13. F6EEQ

    Pro suitable for beginner?

    I had the same question some month ago, and the answer is YES !!! Basically there is no difference in the FPGA management between 200/500/PRO, but Spartan 6 has more possibility. The difficulty to learn will be the same (and believe me I'ts not so easy!!) but you will use the same software (XILINX ISE) and you use the same SOC (ZPuino) but with much more capacity. As the price is not so different I would definitely recommend PRO + Logic start Megawing. After it's up to you to make progress, but the forum is a great help thanks to very keen contributore as Jack, Alvie and Hamster to name only a few. I got my PRO in July, and I'm beginning to construct some easy projects and its a lot of fun ... and some headhakes too!! Softcore is OK, but it's a little bit difficult to apprehend in the beginning, although some example are provided, but you fire them without understanding all the ins and out. Best start is with Hamster book "introduction to Spartan FPGA". I'm not yet at the end, but at least it is progressive, interesting and does not require too much knowledge nor additional components than the LS. WIKIPEDIA is also a very good source (search easily FPGA). There is a very good tutorial, but it is in French langage... which is perfectly OK for me!!! Feel free to ask mor info. Have fun.
  14. F6EEQ

    Access to non wing pins

    Hi Technomancer, thats exactly what I wish to do. If there are no counter, I could do that with VHDL, but at a time or aothet, i have to cnnect this with the C program of the ZP, and thats where y problem is. I'm on business trip and I read this not really with much attention, and I will have a better look on the WE!!! Thanks to all.
  15. F6EEQ

    Access to non wing pins

    Hi Alvie, As far as I understood, the GPIO is OK to interface to a 2*16 LCD or some LEDS. Now my question is how to link the output of the encoder (VHDL signal) with the ZP. If I was using only FPGA and LS I would solely send this to a LED, but I want to use this to drive one ZP counter (as if I was sending something to timer0 in a PIC). So may be signal is not the right term, but this is the "variable" (I cannot find another word) which is telling which way the encoder is rotating, and which is generated by a VHDL process. If you have a look at the XILINX frequency generator schematic I spoke about in another post, I wish to do exactly that. I hope to be clear!! Thanks anyway for you precious help.