TAG

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Everything posted by TAG

  1. TAG

    SoundBlaster FM HDL

    On this page: http://audio.gadgetfactory.net/index.php?n=Main.YM2149MIDISynthesizer there is this quote: "There is open source VHDL for NES, Atari 2600, SoundBlaster FM synth, and other sound chips that is available." I have found HDL for NES and Atari 2600, haven't been able to find any FM chips. Anybody have a link?
  2. TAG

    SoundBlaster FM HDL

    Awesome! Thanks for sharing, I'll have to give it a try.
  3. A wishbone peripheral of the sound generation portion of the Atari TIA chip. Example sketch is a port from Teensy to ZPUino of the Atari TIA synth by Brian Peters: http://www.worldwidewebside.com/brianpeters/?page_id=198
  4. TAG

    SoundBlaster FM HDL

    Just saw this: https://github.com/gtaylormb/opl3_fpga
  5. I was able to get it to compile by changing: #include "zstdio.h" to #include "stdio.h" in HardwareSerial.h and ptplay.cpp
  6. I'd like to start looking into adding more chips to the RetroCade Synth. I have had some luck implementing HDL representations of the Atari TIA chip and the 2A03 APU from the NES in a cypress PSoC device, and would like to do the same with the RetroCade Synth. I have done some poking around on the forums, and from what I have seen it looks like the place to start would be to use the Papilio SOC. In theory it looks similar to the way the Cypress PSoC creator works. With that tool I just would create a symbol and define the I/O, then the tool would generate an HDL skeleton file with the IO defined and I just had to paste in the soundchip HDL code. Then I could place the symbol in the schematic editor and draw the connections. For interfacing between the micro-controller and custom peripherals there were symbols for control registers that you could wire to the HDL symbols, you would just write to the control register in the microcontroller application in order to control the peripheral. From what I can tell this is where the wishbone interface comes into play with the Papilio SOC, the details of how this interface works are not clear to me. Can you point me towards some documentation that would help me understand how I would go about controlling new chip peripherals from the ZPUino sketch? As far as the tools I would need to get started, I would need: Papilio SOC ISE webpack RetroCade Installer Am I missing anything? Is there a Papilio SOC project for the RetroCade synth that I could use as a starting point? I have seen that there is a branch of the ZPUino for RetroCade synth with the POKEY. A perfect example would be how to create that branch from the standard RetroCade synth by using Papilio SOC. Is Papilio SOC at a point where that would be possible? Does what I am asking make sense?
  7. I used the Designlab tutorials to make a wishbone peripheral out of the sound portion of the argh2600 project. Here is a quick demo: https://youtu.be/tuqGfEaryp0
  8. TAG

    SoundBlaster FM HDL

    It looks to me like the code on OpenCores is more complete even though it specifically calls out the OPL2 as not fully working
  9. Trying to remember where I left off with this. If I recall I had a .nsf player and there seemed to be some timing issues and I wasn't sure if the problem was with the player or in the HDL. Would like to get a VGM player working to both test the NES peripheral as well as being a general purpose player for other chips.
  10. TAG

    VGM player

    This project has some arduino source that might be a good starting point: http://www.smspower.org/forums/11547-HardwareVGMPlayerUsingSN76489Chip
  11. TAG

    VGM player

    I just discovered the VGM file format: http://www.smspower.org/Music/VGMFileFormat Seems like a VGM player would be a good fit for the Retrocade synth since a single player could be used for many chips.
  12. TAG

    VGM player

    Have you seen this device?: http://gimic.net/index.php?Getting%20Started%20with%20G.I.M.I.C Looks like it has a VGM player, doesn't appear to be open source from what I can tell though.
  13. TAG

    SoundBlaster FM HDL

    Thanks, I'll dig in and see if I can make use of it
  14. I submitted a pull request for my library for the 2A03 and wishbone peripherals for both the 2A03 APU and the Atari TIA
  15. I made a basic Ctrlr panel to control/test the chip via midi: http://ctrlr.org/ I looked at the flowstone retrocade control panel, but there seemed to be a learning curve there and I had already used ctrlr. I am working through the details of how midi should control things, and using NSF files to try and identify any issues with the chip implementation. Once I get through some of that I'll make a video.
  16. Perfect, I have it working now, more to show off in the video
  17. Can you tell me the necessary connections in the schematic library in order to enable midi in the retrocade sketch? I created an arduino library for the 2A03 APU using the YM2149 library as a template, and have added it into the retrocade sketch. If I can get the midi connected in the schematic I should be able to start playing my new peripheral via midi.
  18. These 4 registers?: #define SID_ADDR_FILTER_FC_LOW 0x15#define SID_ADDR_FILTER_FC_HI 0x16#define SID_ADDR_FILTER_RES_FILT 0x17#define SID_ADDR_FILTER_MODE_VOL 0x18 So in the current release only the SID player writes to these addresses, is that a correct assessment? Functions need to be added to the SIDVoice class to set them, and then CC messages added to the handler? If so then I think I can make that happen.
  19. While digging into the retrocade project I thought about how easy it would be to control real chips, since the HDL chips are implemented with the same interfaces as the real chips it seems to me that it would be very simple to modify a SID peripheral for example to just connect the interface signals to IO and drive a real chip SID. It would be a great way to compare the real thing to the HDL versions, and a way to use real chips if you had them.
  20. Yes, I'll make a video. I am able to play back data from .NSF files through the peripheral, but you can definitely tell that the low pass filter that is in the NES after the chip output is missing. Has any low pass filtering been added for any of the other Retrocade chips? I have an actual NES that I have taken apart, I'd like to hack in the Retrocade output pins right into the NES hardware where the audio outs of the real chip would normally connect, that way I could do a more apples to apples comparison to a real NES.
  21. I just realized that the audio examples in the Papilio Schematic Library use the Audio Wing and I have the RetroCade Megawing. Is there a symbol for the RetroCade Megawing yet? If not is there a way that I can connect an Audio Wing in the schematic in such a way that will result in audio output on the necessary pins in order to get sound out of the RetroCade Megawing in the meantime?
  22. Is this all I need to do to write to registers of a peripheral in wishbone slot 5?: #define APU2A03BASE IO_SLOT(5) void setup() { // put your setup code here, to run once:REGISTER(APU2A03BASE,0)=0x3F;REGISTER(APU2A03BASE,3)=0x03;REGISTER(APU2A03BASE,21)=0x01; }
  23. Ok, I am pretty close I think. I created a symbol for the NES APU after packing the wishbone signals. I connected it up in one of the simple audio examples replacing the existing chip, and was able to generate a bit file. Now I am stuck at how to write registers to the wishbone peripheral from a sketch. To start, I just want to be able to write a few registers (just like I was able to do in the simulator). I tried looking at the example sketches to see how it is done, but I'm just not seeing where the access to the wishbone bus happens.