William MARTIN

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Posts posted by William MARTIN

  1. Many thanks,


    So the previous test confirm that they don't have issue to send random data to the JTAG port when the FPGA is not in programming mode.


    And i can't test on a papilio one because the JTAG does not work the same way.

    - Papilio One based on Spartan3e have a JTAG always on.

    - Papilio Pro based on Spartan6 have a JTAG enable only when the push button reboot is pressed.


    Right ?



  2. Thanks you for the trick on FT2232.


    Did you known if the FPGA listen the JTAG port, if it's not in programming mode ? Can random data can do reset or corrupt the programming of FPGA / EEPROM ?

    For the moment, i have only a papilio one 250K which don't have a reset BP like a papilo pro.



  3. Hi,


    I want to use a papilio Pro as dev board, before make my own.

    In this futur board, i will not use a USB interface for the JTAG, but just a simple connector and a Bus pirate[1] in JTAG mode.

    The bus pirate can be setup in a SPI mode too, it's allow communication between the FPGA and a computer.


    If i share the same Bus pirate connector for the SPI interface and the JTAG interface, i will send random data on the FPGA JTAG when it's not in programming mode.

    Does someone know what happen in this use-case ?



    William MARTIN


    [1] http://dangerousprototypes.com/docs/Bus_Pirate