• Content count

  • Joined

  • Last visited

Posts posted by veqtor

  1. Hello Stefano,

    Unfortunately there is no option for a more powerful chip, the Papilio Pro is already using the most powerful chip available in the tqfp footprint... In order to use the next step up beyond the LX9 we would need to use a BGA footprint, and I've been burned on bringing BGA based designs to the market in the past. I might make another attempt this year, but it would be a ZYNQ board.


    A zynq board would be really cool! Wow!

  2. I know the pipistrello board. But ...I am not the board designer, only the section manager :( and I have suggested the design team to take a look at that board too.

    I'd be really interested in a pipistrello, I think a lot of us would be. The LX45 seems awesome. I work at a school, if they get manufactured by someone, I might convince the school to buy a lot to use as a teaching platform fpga-audio-dsp platform.

  3. The C64 still needs a SVF for it to be complete, but I found one at the wiki:

    Unfortunatly it's in verilog so I wouldn't know how to work it into the netsid code.

    Looking at the block diagram it seems to me it's just about right. Very little is known about the C64 svf, except it was vanillla and probably done with CMOS inverters and used a crude R2R dac as a variable resistor to control the cutoff. Putting more effort into emulation of that particular svf design could yield somewhat more authentic results but I doubt there'd be much of a difference tbh, what could account for some of character is the output dac from the chip and also the multiplying dac after the filter. Any DC offset on the pre-filter dac would make the filter do weird things while sweeping etc.

    looks like the bp and hp outs aren't implemented yet, but that should be easy enough...

    edit: just to clarify how to get the other outputs:

    HP out could be grabbed from this part:

    mA <= f;
    mB <= ((DataIn << 18) - mP - z2) >>> 17;

    where HP is being sent to mB (multiplier b input). Take out that step and send it to a HP register besides sending it to mB.

    BP out would be pulled from here:

    mA <= f;
    mB <= z1 >>> 17;
    z1 <= mP + z1;

    Besides sending mP + z1 back into z1, write it to a BP register.

    All that is left then is to make a MUX that sums the various outs so that notch (LP+HP) and such variants can be created.

    I hope this can be of some help! ;)

  4. also, if you remove the z80 core, would that help? z80 was used mainly for Master System backwards compatibility, iirc..


    as per http://www.vgmuseum....ystems/genesis/

    The Genesis 3 does not have the Z80 processor, and that means the following:

    1. Unable to run the MS convertor as it needs the Z80 chip which is the brain of the SMS.

    2. Unable to run Game Genie, the Z80 must have played a role in the use of this for code break ins.

    3. Unable to run special games such as Sega's Virtua Racing, which again uses the Z80.

    sound - there does exist some C code but i havent looked at it, besides i wouldnt know how to port that

    to any hdl.

    I've started building some OPLx sound generation in vhdl, but I've only come so far as to generate the special LUTs that are used for performing multiplications without multiplication, weird yes, crazy yamaha engineers that also did the soundblaster. The VHDL I'm trying to make will be compatible with ymf262 and also the one in the megadrive.

  5. Been doing some math and can't get I want to do to work on the Papilio one nor the Pro so I've decided to go the Altera route for a de0 nano that has low memory compared to pro but the 66 18x18 multipliers are very handy if you're doing dsp (reverbs) and super-high-res fm-synthesis (96khz 128x oversampled and 24-bit).

    So now I'm selling my papilio one 500k, never had time to use it so it's not even got the headers soldered onto it. Price is €45 so that's €10(?) off of the normal price + shipping from Sweden which is about €6 uninsured in europe.

    If this thread somehow violates the terms of use then please feel free to remove it. Wasn't sure where-else I'd find people buying a Papilio so...

    It's a shame because I've gotten into the xilinx tools but what can you do.

  6. Sounds like the built in delta-sigmas will be good enough for generating control voltage. I'll run audio in and out of the papilio using external adcs and dacs. My oscs will be somewhat SID-inspired but also take some cues from these cheap solutions on old Roland digital synths. For vcf I'm going to try building a cmos-inverter state-variable filter to get close to the Sid sound. Also I have my eyes on this programmable filter ic that implements a svf using switching capacitors.

    The goal is something like four voice synth similar to a sid with a built in sequencer.

  7. It is possible to do an ADC using sigma delta, but you need an external comparator for it to work. The Xilinx app note 155 talks about it. I prefer to go with a SPI ADC like was done with my RetroCade Synth and this SPI Wing. The sigma delta ADC works by sweeping through a voltage range until the comparator indicates that the desired voltage is found, so it's probably not real fast...

    The sigma delta DAC is really good, you can read about it in Xilinx app note 154. We use this sigma delta DAC all over the place and it sounds great, there is a wav player that outputs sound that is as good as any CD I've heard. We use it for the Papilio Arcade games and we use it for the output of the RetroCade Synth, which you should take a look at when you get a chance.


    Cool, I really only wanted to use SD-ADC for reading loads of potentiometers but I guess I'll go for encoders, seems easier.

    I think I'll drop controlling an external analog VCO and do waveform synthesis for my project on the FPGA. One more question though, is the SD-DAC good enough, in your opinion to control an external voltage-controlled amplifier? I want to realize an external filter, perhaps with an external dac controlling a SVF or perhaps a steiner-parker filter and I'm considering using an analog VCA after and then it goes to the final output. Other solution would be doing an VCA emulation in the FPGA and that would open up for post-processing I guess. Thoughts?

  8. So, I was thinking about getting a Papilio one but I have some questions:

    Is it possible to realize an ADC using sigma delta?

    Something like this:


    What is the stability of the DAC using sigma delta? Can I use it to control analogue synthesizers, that is, is it stable or jittery?

    In a modular, oscillators are controlled using "control-voltage" where 1volt = one octave so that's 0.083333... volts per semitone. That means a 0.001 jitter will be audible instability. So I will probably need an external dac or? I will need to amplify the output to cover something like a +/-5 volts range (10 octaves).

    I hate smd soldering, any other options for high-res dacs?