jbb

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About jbb

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  1. jbb

    Papilio DUO Kickstarter - Feedback request!

    Yeah the problem isn't duties and VAT, it's the fact that the delivery (well I object to those too, but that's a different issue). The issue is the additional fee that the delivery companies charge for collecting that from me. I'm sure I have no legal requirement to pay them for a "service" I never requested from them but it's not always that easy. it's not a problem though, I'll complain and pay it if I have to Anyway kickstarter is looking good I wanted an HDMI port and I'm not sure it will reach the goal for that, but I guess it's not that hard to make a board myself if I have to
  2. jbb

    Source control / ISE

    Excellent, thank you.
  3. Using the xilinx ISE package with VHDL, but want to store my code in git. There are many, many files in the directory, does anyone know which I need to store in order to have a working system? Obviously my .vhd and .ucf files, and .xise appears to be a project file? Are there any others I need to save? And what about generated IP components? It's not clear what i need to store for those. Anyone got any ideas or experience of this?
  4. jbb

    Timing constraints

    Thank you for that. Ah, I wasn't aware that the DCM component was clever enough to pass through the timing, that makes sense though. Thank you for the advice on the pack I/O properly. It seems it was already turned on so I assume it's the default, but defintatly worth checking!
  5. jbb

    Timing constraints

    I'm slowly working on my own (slow and basic) sdram controller while learning VHDL (I only did verilog before). I'm using a DCM block to generate a 100Mhz clock for my state model for this. It worries me that I might try to do too much logic and signals won't be computed in time before the next clock comes along which obviously will break things. I assume this is what the timing constraints are for though? To verify that your design will work at the speed of the clock. But I can't find any information about how to add constraints saying that a specific signal is generated using the 100Mhz clock rather than the 32MHz standard clock for example so the logic needs to be fast enough to work for that. Or rather I can find lots of information. Too much... And I don't know where to start. Can anyone either help me out with how to set up suitable constrains, or point me at an introduction to how to do this rather than the hundreds of pages of documents that tell you everything at once. (Which obviously I'll read once I understand the basics)
  6. jbb

    UCF Files

    When I use the generic .UCF file with all the pins defined in, my compilation fails because I'm not using anything connected to most of the pins. Is there any way to tell the compiler to ignore that or do I have to comment out the unused lines from the UCF file?
  7. jbb

    Got mine

    Ah the memory is 16 bits wide, I was assuming a byte, that will double the bandwidth and make it perfectly usable
  8. jbb

    Got mine

    First of all Merry Christmas to everyone here Secondly I've been looking into using the sdram for video. I have a question though. With a fairly low video resolution of 640x480 there is a pixel clock of 25MHz or so. If I need 3 bytes per pixel for RGB then that's 75MB per second needed. But looking at the memory it can only return one every 10ns but that's if you manage to read a byte every clock cycle at 100MHZ which isn't really possible and if you manage one every 2 clocks then it's only 50MB/s which isn't enough even for this lowish resolution. Am I missing something?
  9. jbb

    Got mine

    Thank you. It's a great device and although it's a challenge to learn new things with it, it's a lot of fun!
  10. jbb

    Got mine

    Well I got a simple VGA 1 bit per color adapter working, next step is I want to get it to display from SDRAM rather than just low resolution block memory. I'm thinking first I should get it working with block memory with artificially introduced latency as I'll have a few clock cycles latency on any SDRAM controller, does that make sense. My real next question is about SDRAM memory controllers. Do we have anything we can just drop in? I looked at the hamsterworks posts which were very helpful but not quite a drop in component. I can work on my own, it's a little out of my comfort zone as I'm a c++ developer and new to this, but I figure it's not beyond me to make one. Am I right in thinking that you need to ensure you do refresh cycles frequently enough but apart from that the speed isn;t that important as I think it would be nice to start slow so I can look at outputs on my oscilloscope if necessary...
  11. jbb

    Loading the SPI Flash on the Papilio Pro

    Is there any source code for any of this, or any information on how the loader works? Mostly I'm just interested for it's own sake so nothing urgent
  12. jbb

    Writing a USB 1.0 stack.

    Sounds good! Is it possible for FPGAs to self-program in some way? Just wondering if it would be possible to use this to program an fpga so it didn't need an external microcontroller or usb chip or JTAG programmer... I guess it would be possible to use it to program SPI flash containing a fpga program at least.
  13. jbb

    Trouble programming pro

    I agree, I think the USB change thing was incorrect and just a coincidence. It seems to work but unreliably as you say. It seems to work reliably for several attempts and then fail several times in a row then work again. It's usable anyway now I know this I just try until it works.
  14. jbb

    Trouble programming pro

    Ok never mind, I changed USB ports on my computer and now it appears to be working as expected. I'm not sure why one USB port would work and another would "appear" to work but not actually work, but I can confirum that the device appears to be working properly and sorry for the long unnecesary question.