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Hmm, this is something I started myself a while ago. One of the problems with extending the AVR softcore is that it just didn't seem to be built for a peripheral rich setup (IO space, etc). But I didn't want to leave an open source GCC based solution. Which is why I've watched the ZPU work with interest. I recently tried to use a quadrature interface from opencores, but it was far too featureful and resource heavy. So instead, I created my own "simple" quadrature interface for the ZPU, and using the standard HD44780 code in the ZPUino IDE install, created a sketch to read the quad counter and write to the LCD. It is so very nice to read a quadrature encoder as simply as: unsigned int y=REGISTER ( IO_SLOT (8) ,0); Serial.println(y); And to know that it is being clocked at 96Mhz. (Of course, I most probably have created a piece of junk, full of bugs - but I think it's cute) The code's a complete mess, but if you're interested... it's attached. View attachment: ZpuQuadDec.zip

Original version of game was running on PIC18F6622 and Dingoo A320. Now it's running on Papilio One 500K + Arcade Megawing. I've used the ZPUino soft processor which is realized by Xilinx Spartan-3E FPGA. VGA signal is also generated by the FPGA. The game can be played with integrated buttons of Arcade Megawing or with Atari/Commodore joysticks. I've used a QuickShot II Plus (SVI-102 Plus) joystick in the video below: Demo Please, use the .bit file included in the ZIP. Otherwise buttons and joystick are not working properly. sometris_v121.zip

This is a library for Designlab and Papilio Duo. The decoder module can have up to 4 encoders. For example 4 wheels on a mobile robot platform. Optionally this can be use with a PID regulator for controlling current position, velocity, and direction of an object. - The shown pins are totally optional - By default the Avr chip is disabled Download: Quadrature_decoder.zip

Hi guys, I just wrote a small C++ application (text-mode) that can compute the two primary configuration values for PLL (multiply and divide), given an input clock speed and the required speed. Since some of these are not possible directly using a single PLL, the application also scans for a dual-chained PLL approach, where the output from the first PLL is fed into the input of the second PLL. These two parameters are enough for you to get a working PLL with your desired frequency. Source code and prebuilt windows .exe available at: http://alvie.com/zpuino/downloads/pllscan/ Enjoy Alvie

I decided to also port the Demon 3.07 verilog code to Papilio_One. This version is identical to the code running on the OpenBench Logic Sniffer board except for using 32MHz oscillator and using serial@115200 instead of SPI. It supports both meta data and input pin data query. The full XISE project can be found here: http://www.saanlima.com/download/Papilio_One/Papilio_One_OLS_3.07.zip 250K and 500K bit files are attached. Let me know if you notice any strange behavior. View attachment: logic_sniffer_P1_250K.bit View attachment: logic_sniffer_P1_500K.bit

I've just done something similar with an old Epson EG2401 display. It doesn't really have enough pixels for Lena, and a single dual-port block RAM suffices as the frame buffer. I made a buffer board to produce 5V logic for the LCD (using 74AHC541s) and used a MAX232 to generate the needed negative voltage. I'd already done this with an AVR, and was able to get reasonably good grayscale by only setting lighter pixels for some fraction of updates. I might try that as my next step here. Avoiding flicker does require "overclocking" the display a good bit past what it was rated for, mine seems very tolerant of such abuse (I only started getting glitches when I gave it a 32 MHz pixel clock with the FPGA controller). Source code: https://github.com/cjameshuff/vhdlstuff/blob/master/sed11x0_lcd.vhd

The Papilio Plus sounded interesting but wasn't available when I started this project and did not have any of the needed interfaces on-board. The Avnet LX9-microboard was also a possibility but the limited user-I/O and the lack of HDMI on-board killed that idea. So the only option left was to make my own board - basically merging the fpga and LPDDR from the LX9-Microboard with the formfactor, wing interface and tool-set from Papilio, then adding all the needed interfaces on-board (and then some more to make it more interesting). The biggest challenge was the 324-ball BGA package which forced me away from the hobbyist PCB vendors (like Seeed studio and OSH Park) to the more traditional (and expensive) PCB vendors that offers the PCB geometry needed for this board (5 mil trace width/spacing, 8 mil holes, 4-layes). In my professional life I have used PCB Universe (http://www.pcbuniverse.com/) for many boards with great success and they have very reasonable prices and an on-line quote and ordering system so it's easy to place an order (disclamer: I have no business interest in PCB Universe, just a happy customer). The quote for this board was $450 for 50 boards, more than I like to spend but still a bargin compared to other options. So far all circuits on the board have been tested OK except for the USB host interface which really need Linux up and running first. The board came out perfect - no cuts or jumpers needed so far. Read more about the board features here:http://pipistrello.saanlima.com My plan is to make this an open-source project once all features on the board have been verified. Magnus Karlsson Saanlima Electronics

I've just got DVI-D running on a Spartan 6, starting from scratch (well, the DDWG specs at http://www.ddwg.org/downloads.asp ) You can find the details of my project (incl all the vhdl source) here: http://hamsterworks....x.php/Dvid_test Feel free to use it in your own projects. Wonder if it will work on the Papilio Pro? Might have to butcher a cheap HDMI cable... Mike This post was covered on Hackaday too. http://hackaday.com/...m-vga-to-dvi-d/