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  1. 1 point
    Here is the problem - you take the signal from the button connected to pin C4 and use that as a clock for the ledst0 flip-flop. This is not how you use an FPGA. Pin C4 is not a clock input pin, which cause the error 1108 you see, and logic signals like btnl should not be used as a clock. FPGAs are intended to be used for synchronous logic designs where a large number of flip-flops are clocked with a common clock. In order to make this possible the clock is distributed to all the flip-flops in this clock domain using special clock buffers and clock networks. The source of the clock is typically coming from an input pin on the FPGA and only a select few pins can be used as clock input. The input clock can be used as is or can be feed to a clock management tile that has resources like PLLs and DCMs that allow you to create a clock with different clock frequency. The Nexys3 board has a 100 MHz clock input signal connected to pin V10 that can be used as system clock. This is what the Nexys3 manual states: Try this code instead: .ucf file: BTW, your switch might "bounce", so you might have to de-bounce the signal from the switch. See What is debouncing? Magnus
  2. 1 point
    Hi all, over the last half year I have implemented a processor and surrounding SoC bringing the RISC-V ISA (http://riscv.org) to the Papilio Pro. It implements the 32Bit integer subset (RV32IM). The project is hosted on Gitub (https://github.com/bonfireprocessor). It still needs some additional documentation, cleanup and ready-to-run ISE projects to make it easy reproducable for others. But I post this link now, to find out if anybody is interested in my work. I will soon also post a bitstream here so anybody with access to a Papilio Pro can play with it. I have also ported eLua to it http://www.eluaproject.net @Jack: If you like I can also present the project in the GadgetFactory blog. Regards Thomas
  3. 1 point
    I finally got around to making a github repository where I've started to collect my FPGA projects together in one place. https://github.com/james10952001 These are mostly arcade related although I did add a recreation of the Heathkit ET-3400 microprocessor trainer. I still have not had a chance to fix the Xilinx ISE installation on my laptop so I haven't ported any of these to the Papilio yet but doing so should be very easy, it's all as platform agnostic as possible.
  4. 1 point
    Hello, I am using DesignLab 1.0.8 under Linux and I have a small problem when generating new bit files. The problem is that the case of the files is different from the default and therefore the IDE won't flash my new file. I either need to rename the file or create a symlink. For example the Multiple_Serial_Ports example Creates a Papilio_Pro.bit file while the IDE expects papilio_pro.bit. With kind regards
  5. 1 point
    I have used SK Pang Electronics (skpang.co.uk) which is a company based in the UK. I just checked and they have the Papilio Pro and Duo in stock. They are out of stock of other items. I noticed that prices rose significantly around the time of the Brexit result, and the fall of the UK pound against the dollar and other currencies. Then again you will get a better rate with the euro against the pound, which will offset for you. Buy now while the UK is still in the EU :-) good luck... --Gary
  6. 0 points
    I recently was using my Papilio One and was erasing the spi flash using the papilio loader, when it disconnected and now it doesn’t show up when I try to upload a program. I tried reinstalling the drivers, but that didn’t work. I also installed the papilio loader on a different computer, and it as well didn’t see the board. The board, with the program that was already there, works fine, but I cannot upload anything new to it, since the computer can’t see the board.