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Showing content with the highest reputation since 05/29/2014 in all areas

  1. 2 points
    Original version of game was running on PIC18F6622 and Dingoo A320. Now it's running on Papilio One 500K + Arcade Megawing. I've used the ZPUino soft processor which is realized by Xilinx Spartan-3E FPGA. VGA signal is also generated by the FPGA. The game can be played with integrated buttons of Arcade Megawing or with Atari/Commodore joysticks. I've used a QuickShot II Plus (SVI-102 Plus) joystick in the video below: Demo Please, use the .bit file included in the ZIP. Otherwise buttons and joystick are not working properly. sometris_v121.zip
  2. 2 points
    This is a library for Designlab and Papilio Duo. The decoder module can have up to 4 encoders. For example 4 wheels on a mobile robot platform. Optionally this can be use with a PID regulator for controlling current position, velocity, and direction of an object. - The shown pins are totally optional - By default the Avr chip is disabled Download: Quadrature_decoder.zip
  3. 2 points
    Or any other Xilinx FPGA board with an FTDI chip with MPSSE-engine connected to the JTAG pins (like Pipistrello but not Mojo or Saturn). This is using the xilinx virtual cable driver. Playtag is written by Patrick Maupin. Steps: 1) you need python 2.7 installed. Get it here:http://www.python.org/getit/ 2) unzip the attached zip file playtag.zip somewhere on your computer 3) open a cmd-window and cd to <playtag>\tools\jtag 4) connect your Papilo board to the computer 5) type xilinx_xvc.py ftdi, this will report the available FTDI ports.You should see the A and B ports of the Papilio board (see image). 6) type xilinx_xvc.py ftdi 0, this will start the xilinx virtual cable server on the A port of the Papilo board 7) you can now use impact and chipscope etc. by selecting the xilinx_xvc plugin. Use this plugin settings: xilinx_xvc host=localhost:2542 disableversioncheck=true See attached images and zip file. Do a google-search for xilinx_xvc for more info on how to use the virtual cable driver. Magnus playtag.zip
  4. 2 points
    There is plenty wrong with VHDL and Verilog but I have to say the biggest problem I (and I think many people from a programming background) have is the business of thinking in parallel. Not just the idea that things like assignments take time and aren't instant but things like the fact that (except for power in some cases) it's actually not worth doing conditional evaluation of something, you can evaluate it every clock at no extra cost, in fact you can evaluate hundreds of un-needed things for free just in case they are relevant to a given cycle. Not sure a language can help much with that. There is simply a gap between the conceptual model of programming and the reality of FPGA.
  5. 2 points
    Hi, not every pin can function as clock input. See here http://www.xilinx.com/support/documentation/user_guides/ug385.pdf page 30, search for "GCLK" in the name. Now did you know that there are PLLs inside the FPGA? It takes 2 min of work (maybe a bit more if you do it the first time) to run the core generator and turn the existing 32M clock into 20 MHz or whatever you like. It's one of the most useful features, IMO, in everyday use.
  6. 2 points
    ever heard of "paralysis by analysis"? My advice still stands: Don't try to buy the "best" or the "right" board. Just get any cheap board, spend two working weeks and learn to make that LED blink.
  7. 1 point
    Mine arrived err... Thursday? I can't even remember, I've been too busy playing with it to care. I dug a jumper out of a bits box and it works fine. Jack, you've done a wonderful job and my jaw hit the desk when I came across the documentation for the LogicStart Shield- so wonderfully thorough! Although the FPGA book has yet to be updated, it's easy enough to work through and I've started the early chapters again to get back up to speed. I can't wait to start talking to the FPGA from the AVR. All in all, a damned good turnout for a Kickstarter- everything arrived safe 'n' sound, everything works, thorough documentation, good support all round. The only thing I'm wanting for is more time to play with it!
  8. 1 point
    Teaser: Yes, that is XThunderCore. Game still crashes after a few seconds, looks like software issue.
  9. 1 point
    That's the spot sorry not much help ATM but it's almost 10pm and I work very early tomorrow. I will reply back on wed after I have a chance to look into it.
  10. 1 point
    I've just finished testing my LED driver PCB - 8 channels, each driving two constant current outputs (well, sinks actually). Loaded with 50 ohm sense resistors it gives 13mA per channel. 33 ohm will give 20mA. It is using discrete transistors to allow for higher power dissipation - maybe up to 300mW per channel, so should survive a hard short in in LED chains that that run at up to 15V. If anybody wants a PCB just ask... I can send it air post so you might just be able to use it for your Christmas tree lights
  11. 1 point
    I hit a brick wall on this for a couple of days - it locked correctly but no HSYNC or VSYNC was being detected by my TV. I've lent my 'scope to a friend to fix his stereo so decided to play with smart LEDs instead. However I had an minor epiphany tonight while getting the boy ready for bed - was looking for the wrong channel for the HSYNC and VSYNC signals. D'oh! Here's the test setup - Pipistrello generating HDMI (powered over the HDMI cable's 5V line! :-/ ), over to my HDMI input wing, then into the Papilio Pro, and out via the 8 bit analogue VGA output of the LogicStart. Holy C@#p - it works! Still a few little random pixel-level issues here and there. Looks like timing between clock domains and/or phase of the capture bit clock. But on the other hand, the errors look consistent between each colour channel - somewhere around the middle of the LSB. Might be a TMDS decode issue. I am stoked.
  12. 1 point
    A Papilio digital line set to be an input should not place that much load on your test circuit as to cause a huge voltage drop. Most likely the FPGA has the internal pulldown resistors configured and they are stronger than your test circuit pullups. You should re-synthesize the bitstream with all pullup/pulldown resistors from the FPGA removed in the constraints file.
  13. 1 point
    Built two boards last night - one was trashed due to a misaligned HDMI connector, the other is looking OK. Haven't powered it up yet! Only problem so far is that the HDMI connector holes are a little bit too big... and yes, I also need to get some nice clean solder for attaching the pins, not my fifteen year old through-hole stuff!
  14. 1 point
    Yeah the subscription is only $50/year for the electronic edition (pdf download). I've been reading CC since I was a young whipper snapper, I have a full pdf collection back to issue 1.
  15. 1 point
    >> I was thinking it's easy to learn FPGA and then make your idea real by using it It is not. It is 1000x harder than it looks. You would use a "virtual com port", send serial data from PC to FPGA. This is relatively easy. Even easier, implement a pseudorandom generator to create the data. But, sorry for being direct, you're totally in over your head. Proposal: Why don't you buy some cheap low-end FPGA board. Papilio is fine, so is any other, just don't try to anticipate what you think you need. What you really need is one LED and two months hard work. Learn to make it blink, control it through the PC (USB-serial port and UART). When you can do that, you'll be in a much better position to judge the task at hand. It would be realistic for an experienced engineer but not if you're starting from square one. PS you don't actually have to buy it, just get the design tools and learn to use them (and get used to simulate: Hardware just tells you "it doesn't work". Not "why"). The tools are neither beginner- nor user friendly, takes a lot of patience.
  16. 1 point
    Halder: At what speed do you want to transfer data ? What encoding/protocol you want to use in the optical part ? is that a full-duplex or half-duplex protocol ? Do you really need to use USB ? Or just using it as a transport protocol ? (implementing USB is really hard) Best regards, Alvie
  17. 1 point
    Thanks Jack! My Kickstarter Papilio DUO Board Builder version is assembled! I have confirmed the power supply and FTDI 2232 are working. This weekend I hope to have time to check out the Arduino, FPGA, and SRAM! When I have it up and running I'll share assembly details and photos. Enjoy! Bill
  18. 1 point
    Just finishing up testing the project.... http://hamsterworks.co.nz/mediawiki/index.php/High_Speed_Frequency_Counter
  19. 1 point
    Hi, I am a contestant of digilent contest, and I need a feedback for my project. The project name is "Real Time Digital Circuit Design tool in FPGA with VGA interface" Short description: This project implements a digital circuit design tool, as the name says, in FPGA. The FPGA board is connected directly on a monitor and a mouse. The user should use this project to create a digital schematic, and he could check the output signals on a logic analyzer which is included in the project. Here we have two working modes: directly mode, using a mouse which is connected directly on FPGA board, and second mode, using PC. In second mode, user should use Xilinx ISE to create a schematic, and after executing a command, some data are transferred to FPGA via RS232 communication and the schematic is created automatically. FPGA part is implemented in VHDL and in second mode, the data prom Xilinx ISE schematic is processed with Visual Basic Script. You can watch on a example movie on the following link: Thank you!
  20. 1 point
    How are the SID filters controlled? I don't see controls for them in the dashboard, are they mapped to CC messages?
  21. 1 point
    Don't you want that to go to the +3.3V supply instead? I didn't think the IO on these was 5V tolerant?
  22. 1 point
    Assuming the need to go to multi-layer for the BGA part, that looks like it will be a very expensive board. You might look at a part such as the XC3S500E-4PQG208I which is in a 208 pin PQFP package. The FPGA is a bit more expensive but the PCB will be a fraction the cost if you can keep it to 2 layers. Also at least when it comes to Seeed, the cost of the board increases rapidly with size. 5cm * 5cm max is around $1/bd, 10cm * 10cm max is $2.50/bd, while the next size up, 15cm * 15cm max is close to $9/bd. If you can manage to keep it within 10cm square then the bare boards are ridiculously cheap.
  23. 1 point
    Latest code for windows and linux32 can be found here: http://pipistrello.saanlima.com/index.php?title=Arduino-1.5.2_on_Pipistrello
  24. 1 point
    Jack, I tried powering the board both through a high-quality powered USB hub and through a direct USB port on the machine. With both, the noise was clearly audible. When I used an external power supply, there was no issue. In a performance situation, there'd be no issue with using a separate power supply, but for development, the approach won't work. I'll try powering from an extra laptop tomorrow, just for another data point. I kind of suspect a ground connection issue, but I'm not much of an electronics buff. -Hans
  25. 1 point
    Hmm, this is something I started myself a while ago. One of the problems with extending the AVR softcore is that it just didn't seem to be built for a peripheral rich setup (IO space, etc). But I didn't want to leave an open source GCC based solution. Which is why I've watched the ZPU work with interest. I recently tried to use a quadrature interface from opencores, but it was far too featureful and resource heavy. So instead, I created my own "simple" quadrature interface for the ZPU, and using the standard HD44780 code in the ZPUino IDE install, created a sketch to read the quad counter and write to the LCD. It is so very nice to read a quadrature encoder as simply as: unsigned int y=REGISTER ( IO_SLOT (8) ,0); Serial.println(y); And to know that it is being clocked at 96Mhz. (Of course, I most probably have created a piece of junk, full of bugs - but I think it's cute) The code's a complete mess, but if you're interested... it's attached. View attachment: ZpuQuadDec.zip