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  1. Today
  2. The libraries are a fantastic aspect of the Arduino and the key thing that makes it a worthwhile if otherwise rather flawed platform. It took me a long time to warm up to Arduino but I love the way I can grab some widget and very often grab a library with example code to make it do something right away. It provides a great way to test the thing out and explore its capabilities right off the bat. I'd love to see a similar collection of HDL modules form, blocks of code that do the grunt work like initializing the device and communicating via whatever interface it uses and bring the controls out to sensible interfaces that can be tied into other modules in the top level file. Ideally these modules should be well commented, especially at the top level explaining what all the inputs and outputs do and what sort of signals they expect.
  3. I may be showing my age but I absolutely loathe nearly any kind of web based software. There are certain things it is convenient for, checking email when I'm away from my own PC with a proper desktop client, occasionally a simple tool, but for any kind of productivity software I find it frustrating. It's always slower, invariably I seem to have to do a lot of scrolling, it never seems to work equally well in all browsers, then for reasons I've never been able to fathom many browsers interpret the backspace key as navigate back to the previous page causing you to lose all the data. I'm forced to use a lot of web based crap at work and I never have taken to liking it. Especially these days when vastly powerful PCs with massive hard drives and gobs of RAM cost peanuts I'm baffled by the trend to return the the mainframe-dumb terminal paradigm. I guess what's old enough is new. That said, I suppose it doesn't really matter to me, I'm pretty content using ISE for my Papilio boards. I'd much rather spend any time I have writing code rather than learning a new tool. VHDL and Verilog are industry standards, code written in a standard language can be synthesized on any suitably large FPGA with minimal changes. With so few developers in the community it's essential to minimize fragmentation.
  4. Haha, yes I actually wanted to use Vivado when I started making DesignLab... Wish it supported Spartan 6 chips. I would jump on a series 7 chip and deal with the BGA issues in a heartbeat. The problem is that the prices are still very high and its not easy for my manufacturers to get them... Right now the cheapest Artix-7 chip on Digikey is $35. I jumped on the Spartan-6 chips for the Papilio FPGA when I saw them on Digikey for less then $20 and I would do the same for the Artix-7. I've been itching to make an Artix-7 board. Ok, this is on my todo list to check out. I would also like to see about getting your Bonfire project setup with continuous integration too. Need to look closer at both of them again. Yes, want to avoid complication for sure. DesignLab was guilty of that, don't want to do it again. Agree completely, the IDE is terrible, but the libraries and ecosystem are great. We could eliminate the Arduino IDE entirely and go with a web based IDE like Cloud9 or a non-web based IDE like Atom and have a much nicer environment. The challenge is to find a way to program the board. Alvie and I are working on a new Papilio board called Unity that is entirely serial based and has a bootloader like the Arduino. This would be easier to integrate into a cloud IDE... Well, given enough time I would redo what I have already done using Packer. Then you can use vagrant to quickly start it up in virtual box, AWS, Parallels, or VMWare. Or go with a docker image... I mention AMI because I already have it up and running. The thing I forgot to mention in my initial post is that it is very cheap to run the AMI as a spot instance. I'm paying about 1 to 10 cents an hour for a AWS instance that synthesizes the ZPUino bit file in around 2 to 4 minutes. That's faster then my development box does... If I left it running all month it would cost ~$7 dollars. The trick is to terminate the instance when you are done so you don't leave disk space laying around unused. That is where they get you with the fees, if you shut down instead of terminate you continue to be charged a hefty fee for the hard drive space that is still allocated. Do a terminate and it frees up the hard drive space and avoids continuous charges.
  5. Yesterday
  6. Well, I think that people find FPGA development hard and difficult has is root cause that they don't understand the difference between hardware and software. Because HDLs borrow many syntactical constructs from programming languages and the code looks like a "program" (this is especially true for VHDL) people think in the wrong direction and get very frustrated. In the moment you realize that it describes hardware and think about expressions as a bunch of gates and signals set in a synchronous process as flip-flops it becomes easy. I personally can write and debug VHDL code as fast and productive as C code. Ok thinks get much harder in the moment you go off-chip. It is possible to write software without ever really understanding how it is really executed in a computer. I know developers who have difficulties to understand what is really the difference between an integer and a float or why it sometimes go wrong when you assign a short to a long :-) It is possible to write software with this limited level of understanding (in fact most JavaScript, php or python code is written by such people ), but it is not possible with Hardware. Even worse, without understanding the concepts it is even impossible to recognize the value of FPGA.
  7. Hi Jack, first of all I'm glad to hear that you continue your work. It sounds a bit ironic that you move away from desgin lab, while Xilinx Vivado goes in the opposite direction. The Vivado IP integrator is like "Designlab on steroids". It is just microblaze and AXI4 instead of zpuino and wishbone. I never tried designlab but recently bought an Arty board to port my Bonfire project (RISC-V on FPGA, see my forum post...) from Papilio Pro to Arty. At first I was disappointed from Vivado because it has less VHDL support then ISE. But I learned quickly that IP integrator steps in for this. You can integate any HDL as "RTL module" in IP integrator, and use the block design to wire the toplevel together. With this I had my processor running together with DDR3 RAM and Ethernet in two weeks. Of course this is far away from the open source idea, but with all the core synthesis work done by propietary Xilinx tool FPGA development is never true open source. But this is all more a side note. What personally I really like on the GadgetFactory is your hardware. I ordered a second Papilio Pro a few weeks ago, because it is the most "hacking friendly" FPGA board on the market (at least for Xilinx chips). It can be leveraged completely with comparable easy to understand open source HDL, e.g Hamsters SDRAM controller. Compare this with the Arty, the DDR3 RAM can only be managed practically with a Xilinx MIG which consumes 25% of the slices and increases synthesis times a lot. And for many usages patterns it is even slower then SDR SDRAM. An upgraded Papilio with a series 7 FPGA would be a dream, of course I have read about the difficulties of BGA... It would also open the path to Vivado, and Vivado could be helpful with your HDL library idea. Especially because Vivado IP cores are based on IP XACT. With FuseSOC https://github.com/olofk/fusesoc there is also an open source package manager supporting IP XACT. I have not used it, but I think it goes in the direction you are aiming for. I have doubts that additional tools like you mentioned in your roadmap really help, they make things more complicated then easier. Some, very subjective words on Arduino: While Arduino is a fantastic idea, the Arduino IDE itself is really crap. It is on the level of Turbo Pascal for CP/M in 1983. While this was a great idea in 1983, it is not in 2017. Regarding your idea with an AMI image: why not making the same with a virtual box VM? Cloud is fine, but quickly cost a lot of money:-) Thomas
  8. I didn't take any pictures but it's pretty trivial to load it onto a Papilio Pro and fire it up. It just looks like Centipede, the only major issue it still has is the sound not working and I'm not sure why that is because I didn't mess with that part.
  9. Last week
  10. Sounds cool, can you post any pictures or video of it in action?
  11. A lot of good advice and ideas. I like Multicomp too, maybe it is a perfect candidate to put up on the new GitLab space and get it doing CI for all the Papilio boards. I've been thinking a lot about the libraries idea, it just needs some common way to connect all the pieces together. Maybe wishbone could do the trick, if we make a wishbone connector without a processor that can just send sequential commands to the wishbone bus to set components up and basic tasks... I envision something like how Alvie has ZPUino setup with wishbone slots so you just connect each wishbone component to a slot and then something simple to control it all. Something like the wishbone testbench that Alvie setup too... But I think the key thing is that I want to work on stuff that people can use... Jack.
  12. This has more or less been my opinion for a while, DesignLab is a neat idea but IMHO it is a huge amount of work to create and maintain while in the end being a dead end that will serve as a crutch enabling people to avoid ever learning HDL and that will become a huge limiting factor down the road. I'm not going to try to tell you what to do but I think it would be great to focus on collecting a library of code a bit like OpenCores, processors, support chips, sound chips, and other interesting widgets that are tested working, and then attempt to clean them up so that they're somewhat consistent and well commented. One of my favorite FPGA projects is the Multicomp by Grant Searle because it is modular and provides a great tutorial on "wiring" up VHDL components into simple but functional computers. Then there is the larger issue that despite the efforts of many including myself, there seem to be very, very few hobbyist FPGA developers, especially the really talented ones who have developed entire projects. I've tried and largely failed to recruit nearly every technically minded person I know and just haven't succeeded in getting much interest and this frustrates me. Part of this is that FPGA development *is* difficult and there is a very steep learning curve but I think an even bigger obstacle is the perception that it's hard when in actuality putting together a project out of existing modules is not much harder than writing an Arduino program. There is a lot of fragmentation, a number of different FPGA platforms out there, each with their own community and largely the same collection of code, much of which has been circulating for years. Too many people who do create interesting new projects seem reluctant to share their code which is something I find baffling, why bother to create something and show it off if you're not willing to share it? Anyway I think we need more people involved, more basic tutorials, more Multicomp-like projects, think something like a kit where the main components are already coded and a tutorial is provided to write the code that glues it all together and results in something cool to play with. Maybe drum up some interest in local hackerspaces? A ~2 hour entry level presentation/class? A YouTube channel that presents FPGA exercises? Reverse engineering an existing FPGA project and explaining in detail what each section does? A tutorial to port projects from other FPGA platforms to the Papilio? I've learned a lot by porting various projects from Xilinx to Altera and vice versa. Something to get more people over the initial hump and writing some code, the more people we have contributing, the more interesting stuff there will be for everybody to draw from and contribute to. It's been far too quiet around here recently, I would love to see more people engaging.
  13. Today
  14. Hello everyone, its been quiet in the forums and at GadgetFactory in general. Just wanted to do a quick update and talk about future direction. First of all, I had a bit of a change up in the last six months. With two new boys in the last couple of years I had to make the decision to move on from working full time on Papilio boards and get a full time job. I've been quiet because it has taken a little time to adjust to working at the new job and continuing work on Papilio boards. I think I finally have things figured out and have a good schedule to work on both. Since time is limited I want to focus on getting back to basics with the Papilio FPGA boards. I think that the DesignLab efforts have not really been useful for many people and it is too much to keep maintaining it going forward. The approach of using the schematic editor has just not worked out as well as I hoped it would and overall it is too hard for anyone to contribute to DesignLab. Lesson learned, I need to get back to accepted industry standard techniques and back to VHDL/Verilog going forward. I'd like to start migrating all of the stuff that is currently in DesignLab into smaller and easier to maintain projects. To those ends this is how I'm thinking to proceed: What is needed (what DesignLab currently does that we want to keep): A way to manage libraries - people need an easier way to add VHDL/Verilog libraries to their projects then what Xilinx ISE provides. A repository for ZPUino Soft Processor projects - DesignLab has several ZPUino SOC projects embedded within it. We need to provide these projects outside of DesignLab. Arduino Integration - We need to make all the sketches from DesignLab available in the latest version of Arduino IDE or a cloud IDE. (Nice to have) Continuous Integration for the automatic generation of bit files for the ZPUino projects. (Nice to have) Xilinx ISE build environment in the cloud. (Nice to have) Cloud based IDE instead of Arduino IDE. Ideas to get there: I like the way node.js manages libraries. I'm thinking to use npm for the libraries and then write node.js code to add libraries to the .xise and .prj files when they are added with npm. Github is the first place that comes to mind but the problem is that it is too hard to organize projects there. I have so many projects there that it is hard for anyone to find anything and there is no good way to organize projects. GitLab allows directories and subdirectories and they have Continuous Integration functionality built in. Perfect for number 4 above. The Arduino IDE has come a long way since we forked from it for DesignLab. THey have made it much easier to add custom boards and programmers. There really should be no need for a fork anymore, we just need to make a custom programmer, board type, and libraries. As mention in 2, GitLab has continuous integration built in. I've already tested it out and have it up and running for a couple ZPUino projects. I have my own personal Xilinx ISE and ZPUino build environment setup as an AMI at Amazon AWS. When I do any development work I just spin up the AMI as a spot instance at Amazon. When I commit code to GitLab it connects to the runner in the running instance at Amazon and kicks off the build process there. It then published the bin and bit files as artifacts that I can then download and run on my board. I can even see all the build logs... If we could publish an AMI or Docker image that has the entire build environment ready to go and people just download and add a Xilinx license file then this might greatly help alleviate the pain of downloading and setting up the tools. What is described in step 5 above is a little tedious when it comes to actually development. It would be nice to use a cloud development IDE like cloud9 for development and have the building happen on a docker instance or something... Jack.
  15. Last week
  16. For a more detailed description of the first line see https://www.nandland.com/verilog/examples/example-reduction-operators.html Magnus
  17. Perfect, thanks! So I had the second one right, the first one I had no idea but it makes sense now that I see it explained. The problem I've had with this sort of thing is trying to search for explanation I can't just google the line of code because the signal names are arbitrary. One of these days I should probably learn Verilog too but it's hard enough to be proficient in just one language without taking on a second one.
  18. Currently it's set up to use joysticks, the original Centipede hardware actually had joystick support but it was never used to my knowledge. Changing it to a trackball like the arcade cabinet should be trivial, the code is there, it's simply not "wired" up to the top level at the moment. The joystick input was just the easiest thing to use at this stage, once everything is working I'll hook up an arcade trackball I have, shouldn't be too hard to interface a PS/2 pointing device instead if one desired.
  19. idle is set to 1 if all bits in counter are 1 (unary reduction operator AND) if internalSck is high then cs is set to 0
  20. Ha, sorry James, I haven't had a chance to try it out. What controller are you using with it? A trackball? Jack.
  21. I would start out with tutorials at the learn website: http://learn.gadgetfactory.net/ Download DesignLab and try out the Papilio Pro examples there. Then check out the free eBook:
  22. Nobody is interested in Centipede? I got it 90% of the way there, the game is playable on the Papilio Pro, has anyone else had a go with it?
  23. After playing around with this a bit I've decided to translate it to VHDL so it's easier for me to work with. Most of it is pretty straightforward but a couple of the lines I'm not entirely sure what they do. Could one of the resident Verilog experts explain exactly what these two lines of code do? The second one I suspect is assigning cs <= '0' when internalSck is true but I'm not certain. idle <= &counter; if (internalSck) cs <= 1'b0;
  24. At the very least you'll need to install ISE and you'll need the Papilio Loader application to load the bitfile. DesignLab is optional, I've never used it but it's supposed to be an easy way for beginners to get going.
  25. I just bought Papilio Pro with the LogicStart Shield. Installed Driver to Windows 10 OK. Board recognized as COM 7 and COM 8 for the Papilio Pro Board. Papilio Loader for Windows is also installed OK. Papilio Pro LX9 QuickStart bit file is also verified board is recognized So next are DesignLab IDE and Web Pack ISE Installations ? Please help me to start for both Papilio Pro and LogicStart Shield since I am very new with the FPGA and your boards and I am very interested of learning to put them to work. How can I verify both are working, please ? Regards,
  26. I just bought Papilio Pro with the LogicStart Shield.

    Installed Driver to Windows 10 OK. Board recognized as COM 7 and COM 8 for the Papilio Pro Board.

    Papilio Loader for Windows is also installed OK.

    Papilio Pro LX9 QuickStart bit file is also verified board is recognized

    So next are DesignLab IDE and Web Pack ISE Installations ?

    Please help me to start for both Papilio Pro and LogicStart Shield since I am very new with the FPGA and your boards and I am very interested of learning to put them to work. How can I verify both are working, please ?

    Regards,

    Huy

  27. Hello, it is forked from the Arduino 1.5.8 code. There should not be any conflict with installing both Arduino and DesignLab IDE, I personally have both installed. There have been lots of changes to the Arduino IDE since 1.5.8 that are not in DesignLab... I've actually been thinking to just make a board definition and library that can be used with the latest version of Arduino IDE... Jack.
  28. I'm wondering to what extent the DesignLab tracks the Arduino IDE, and what version Arduino IDE the current DL is based on. Also, is there any conflict in installing both DL and Arduino (on Windows)? Thanks.
  29. Earlier
  30. Hi, How can I access the on-board SRAM space directly in designlab? I could not find the offset address of external memory anywhere... regards.
  31. Hello Brandon, Glad you got it working and thank you for the pull request. I'm actually thinking through a reboot of the source code at the moment. Getting away from DesignLab, the schematic based approach just didn't garner much interest, and going to a node.js solution with examples synthesized with a CI backend on Gitlab. I've actually started a couple of projects with CI at Gitlab and am still working through how to manage VHDL/Verilog libraries with node.js before I proceed. Hopefully I can do a reboot and get everything easier to find and maintain... Jack.
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