Luís Marques

FPGA current limiting

5 posts in this topic

I was looking into how to limit current from FPGA pins, in the context of safely driving 7-segment LEDs. I thought that the .UCF output drive strength values were somewhat arbitrary values, but according to "Spartan-6 FPGA SelectIO Resources User Guide" the values are actually in mA. Nice. Yet, when I went to test this I got unexpected values. For instance, when I chose LVTTL & DRIVE=12 I think I got something like 46 mA, and when I reduced it to DRIVE=2 I think I got 6 dot something mA. Whatever it was it was very different from the specified DRIVE value. This was tested by shorting that pin to GND, with just the amp meter in series. Since the current did reduce when I reduced the drive strength, I though that maybe my cheap multimeter was not correctly calibrated. Yet, when I connected a 6.1 V power source with a 1K resistor in series I got the expected 6.1 mA. Any ideias?

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I don't think its a good idea to connect directly to ground... I think that drive strength is how much current it will provide through that pin under load. So put a load in by connecting a 1k resistor in series with your ammeter and then see what the current is...

Jack.

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Thanks for the feedback Jack. Here's what I would expect to see. With 3.3 V (IOSTANDARD=LVTTL) and a 1K resistor, I would expect a current of 3.3 mA. Given the DRIVE options of 2, 4, 6, 8, 12, 16, 24, I would expect all of the DRIVE values other than 2 to let the full 3.3 mA to flow. Here's what I get:

DRIVE=2: 2.85 mA
DRIVE=4: 3.05 mA
DRIVE=12: 3.18 mA
DRIVE=24: 3.22 mA

The values for DRIVE > 2 make some sense to me, since they are within a somewhat reasonable margin of 3.3 mA (< ~9%). With DRIVE=2 I don't get the expected current limit of 2 mA, by a large error margin (~42%).

With the 'scope I didn't detect any weird power switching pattern.

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Hi,

the outputs cannot be used as constant current source. Been there, done that, got the T-shirt and had to buy a new LED.

If absolutely desperate, I'd use PWM: E.g. generate a 200 MHz clock and a counter that generates one pulse in 32 or so.
With a short circuit current ~ 300 mA this should give no more than ~ 10 mA in average. But this is a hack in oh-so-many ways (among them: tune it to a radio station of your choice...)

 

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BTW, here is the official definition of drive strength, straight from the horse's mouth:

https://www.xilinx.com/support/answers/38820.html

"The drive strength of an I/O specifies how much current we can drive and sink while maintaining the minimum Voh and Vol levels."

The bold part is the catch: it doesn't refer to the short circuit current.

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