Papilio Pro - writing to SPI Flash vs FPGA


amalawi

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Hi,

 

I have a papilio pro board and going through IntroToSpartanFPGABook. I notice that while using Papilio Loader 2.7, I can test the examples using the 'FPGA' write to: option, but the 'SPI Flash' will not persist if i disconnected the usb cable. The terminal shows the following:

 

: sudo papilio-prog -b chapter7.bit -s e -v   

Using built-in device list
JTAG chainpos: 0 Device IDCODE = 0x24001093 Desc: XC6SLX9
 
Uploading "chapter7.bit". DNA is 0x39ea4e6060d673ff
Done.
Programming time 541.9 ms
Erasing External Flash Memory.
Uknown Flash Manufacturer (0x00)
Error: SPI Status Register [0x00] mismatch (Wrong device or device not ready)..
Error occured.
USB transactions: Write 178 read 10 retries 9
 
I'm running Linux Mint 17.1 - x86_64 (3.13.0-37-generic #64-Ubuntu SMP)

 

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Thanks for the prompt response.

 

I tried the command line which gave the following output that says everything is ok (erasure, verification, programming and final verification) , however, the fpga is not programmed (meaning the example is not working as expected)

 

: sudo papilio-prog -f chapter7.bit -b ~/Downloads/Papilio-Loader-master/Fpga/bscan_spi_lx9.bit -v -sa -r
Using built-in device list
JTAG chainpos: 0 Device IDCODE = 0x24001093 Desc: XC6SLX9
 
Uploading "/home/alaa/Downloads/Papilio-Loader-master/Fpga/bscan_spi_lx9.bit". DNA is 0x39ea4e6060d673ff
Done.
Programming time 540.1 ms
 
Programming External Flash Memory with "chapter7.bit".
Found Macronix Flash (Pages=32768, Page Size=256 bytes, 67108864 bits).
Erasing    :
Doing Partial Erase
......Ok
Verifying  :
......Pass
Programming :
......Ok
Verifying  :
......Pass
Done.
SPI execution time 17319.6 ms
USB transactions: Write 6851 read 6682 retries 6492
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nither -vc nor -C caused the gadget to show the example code. I needed to power cycle it. here is the terminal output

 

: sudo papilio-prog -vC

Using built-in device list

JTAG chainpos: 0 Device IDCODE = 0x24001093 Desc: XC6SLX9

 

STAT Register

ID_ERROR  = 0 IDCODE not validated.

DONE      = 0 Input from the DONE pin.

INIT      = 0 Input from the INIT pin.

MODE      = 000b Input from the MODE pins (M2:M0).

GHIGH_B   = 0 0 = asserted.

GWE       = 0 0 = all FFs and Block RAMs are write-disabled.

GTS_CFG   = 0 0 = all I/Os are 3-stated.

IN_ERROR  = 0 Legacy input error.

DCI_MATCH = 0 DCI is matched.

DCM_LOCK  = 0 DCMs are locked.

CRC_ERROR = 0 CRC error.

USB transactions: Write 6 read 4 retries 1

 

 

In the moment power cycling should not be a big issue.

 

Any way thanks for the support!
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As I said in the other thread (http://forum.gadgetfactory.net/index.php?/topic/2515-papilio-prog-reconfig-bug-workaround/) the fix for this is simple - just update the Reconfigure() routine in progalgxc3s.cpp like the way the current xc3sprog code does it and recompile.

 

If you want to try it, here is a link to a version with this fix implemented (windows version) : http://www.saanlima.com/download/papilio-prog.exe

 

Magnus

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Thanks for the prompt response.

 

I tried the command line which gave the following output that says everything is ok (erasure, verification, programming and final verification) , however, the fpga is not programmed (meaning the example is not working as expected)

 

: sudo papilio-prog -f chapter7.bit -b ~/Downloads/Papilio-Loader-master/Fpga/bscan_spi_lx9.bit -v -sa -r
Using built-in device list
JTAG chainpos: 0 Device IDCODE = 0x24001093 Desc: XC6SLX9
 
Uploading "/home/alaa/Downloads/Papilio-Loader-master/Fpga/bscan_spi_lx9.bit". DNA is 0x39ea4e6060d673ff
Done.
Programming time 540.1 ms
 
Programming External Flash Memory with "chapter7.bit".
Found Macronix Flash (Pages=32768, Page Size=256 bytes, 67108864 bits).
Erasing    :
Doing Partial Erase
......Ok
Verifying  :
......Pass
Programming :
......Ok
Verifying  :
......Pass
Done.
SPI execution time 17319.6 ms
USB transactions: Write 6851 read 6682 retries 6492

 

BTW, I would be concerned about the last line above, the high number of retries indicates that there is an issue with your USB link (bad cable etc.).

 

This is what I see when I program a Papilio Pro:

Using built-in device list

JTAG chainpos: 0 Device IDCODE = 0x24001093    Desc: XC6SLX9

Uploading "tools/bscan_spi_lx9_qfp144.bit". DNA is 0xf9e7a182038fb0ff

Done.

Programming time 553.0 ms

Programming External Flash Memory with "ISE/plustoo_top.bit".

Found Macronix Flash (Pages=32768, Page Size=256 bytes, 67108864 bits).

Erasing    :

......Ok

Verifying  :

......Pass

Programming :

......Ok

Verifying  :

......Pass

Done.

SPI execution time 15932.9 ms

USB transactions: Write 6851 read 6682 retries 0

 

Magnus

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Magnus, this is strange as both of the front 2 USBs as well as some of the back ones (3 USBs) are giving this high number of retries ~32000, however, there is also another 2 back USBs which gave ~4000 retries !? maybe its the PC or the power line or another thing, I'll keep investigating, but thanks for indicating that this number should be normally 0.

 

Using the -C or -c trick with the lower retries ports (the 2 back USBs) does the trick but should be on a separate terminal line.

 

Another thing is that after batching progalgxc3s.cpp with your code snippet, I'm me able to use the -r option, though, this should be on a separate invocation (2 steps, program cmd line, reconfiguration cmd line). I had looked through the source code of butterfly.cpp and noticed that reconfiguration does not happen when the user wants spiflash (which is my case), thus I had also make a kludge and copied the "if (reconfigure)" from the else branch of "if (spiflash)" into the positive branch (after line 347). After compiling I can now specify the -r option in the same command line and get it also reconfigured after programming (Great!)

 

I'll continue with the tutorial and at the same time check if I can pin down the issue of high number of retries.

 

Thanks!

 

Ala'a

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Great!  Yeah, I did the same fix in butterfly.cpp to make it work on the same cmd line.

 

I also fixed another thing that confuses a lot of people - if there is a problem with the JTAG connection between the FTDI chip and the FPGA (bad board or opening the wrong FTDI device) then one of the most cryptic error message will shop up: Invalid chain position 0, position must be less than 0 (but not less than 0).

 

So I patched get_id at top of butterfly.cpp to look like this (the added code in italic) so it's more clear what the problem is:

 

unsigned int get_id(Jtag &jtag, DeviceDB &db, int chainpos, bool verbose)
{
    int num=jtag.getChain();
    unsigned int id;

    if (num == 0)
    {
        fprintf(stderr, "No JTAG device found, aborting.\n");
        return 0;
    }


    // Synchronise database with chain of devices.
    for(int i=0; i<num; i++)
    {
        int length=db.loadDevice(jtag.getDeviceID(i));
        if(length>0)
            jtag.setDeviceIRLength(i,length);
        else
        {
            id=jtag.getDeviceID(i);
            fprintf(stderr, "Cannot find device having IDCODE=%08x\n",id);
            return 0;
        }
    }

    if(jtag.selectDevice(chainpos)<0)
    {
        fprintf(stderr, "Invalid chain position %d, position must be less than %d (but not less than 0).\n",chainpos,num);
        return 0;
    }

    const char *dd=db.getDeviceDescription(chainpos);
    id = jtag.getDeviceID(chainpos);
    if (verbose)
    {
        printf("JTAG chainpos: %d Device IDCODE = 0x%08x\tDesc: %s\n", chainpos,id, dd);
        fflush(stdout);
    }
    return id;
}

 

Magnus

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