kk_omnisys

Zpuino on the pipistrello

3 posts in this topic

Hi!

 

I am working on getting the Zpuino on my Pipistrello.

 

I cloned the Zpuino repository from github yesterday and created a ISE project for the pipistrello using the files referenced in the pipistrello board directory .prj file.

 

It runs through the synthesis, p&r and bit file generation fine after switching out the deltasigma entity for an empty wishbone device.

 

Is there anything else that needs to be done for the .bit file to be correct?

 

Best regards

Kalle Kempe

Share this post


Link to post
Share on other sites

Check the Pipistrello system clock.

AFAIK it's 50 MHz, compared to the Papilio's 32 MHz.

I don't know the ZPUino internals, but probably there is a clock generator block somewhere that needs reconfiguration.

 

You'll definitely need correct clock rates for any UARTs to work.

Share this post


Link to post
Share on other sites

Got it to work.

 

The CPU had no Zpuino code to run in the flash.

 

Got that running with the command line tools:

 papilio-prog.exe -b bscan_spi_lx45.bit -f pipistrello_top.bit -v -r -r

And manually programming the Zpuino code:

C:\DesignLab-1.0.7\hardware\tools\zpu\bin>zpuinoprogrammer.exe -R -d com25 -b data.bin -v 

Share this post


Link to post
Share on other sites

Create an account or sign in to comment

You need to be a member in order to leave a comment

Create an account

Sign up for a new account in our community. It's easy!


Register a new account

Sign in

Already have an account? Sign in here.


Sign In Now