kk_omnisys

Designlab and Pipistrello

6 posts in this topic

Hi All,

 

I'm working on a project with a Pipistrello 2.0 that I want to use with the Designlab.

 

Presuming that I get the .bit file into the flash and FPGA I also want to upload code from the Designlab GUI.

 

I see that the Designlab 1.0.7 has been streamlined for only papilio boards. I have started modifying some files around the designlab but so far I'm flying blind.
 
Can someone help with instructions on how to enable Pipistrello in the Designlab GUI?
 
Best regards
Kalle Kempe

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Hello Kalle,

 

It would take a couple days work to enable support for the Pipistrello, it shouldn't be very hard but Magnus and I would have to work together. I'm scheduled to go to China for the month of October so it might be hard to get together with Magnus to work on this, but we will see if we can work something out.

 

Jack.

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I found that I can program the Zpuino code from the commandline

C:\DesignLab-1.0.7\hardware\tools\zpu\bin>zpuinoprogrammer.exe -R -d com25 -b data.bin -v 

But that means that I have to compile the source, find the temporary path where the binary is and copy it to some place where the zpuino programmer executable is.. tedious

 

Kalle Kempe

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Just found a solution.

My guess is that the upload speed for papilio with sys clk of 96 MHz and the 100MHz is larger than the tolerance of standard UART. Uploading in designlab can be enabled by changing the upload speed.

 

I found the line in Designlab\hardware\zpuino\zou20\platform.txt which describes the command issued to program the board

tools.zpuinoprogrammer.upload.pattern="{path}/{cmd}" -s {upload.speed} -R {upload.verbose} {upload.memory} -d {serial.port} -b "{build.path}/{build.project_name}.bin" {upload.smallfs}

The difference between my line in previous post is the port speed.

 

So in designlab\hardware\zpuino\zpu20\boards.txt I created a section for the pipistrello:

zpuino_pipistrello_lx45van.name=Pipistrello - ZPUinozpuino_pipistrello_lx45van.vid.0=0x0403zpuino_pipistrello_lx45van.pid.0=0x6010zpuino_pipistrello_lx45van.name.0=Pipistrello FPGAzpuino_pipistrello_lx45van.boardid=0xba011a00zpuino_pipistrello_lx45van.upload.protocol=zpuino-serialzpuino_pipistrello_lx45van.upload.maximum_size=8388608zpuino_pipistrello_lx45van.upload.size_sections=allzpuino_pipistrello_lx45van.upload.speed=115200zpuino_pipistrello_lx45van.upload.tool=zpuinoprogrammerzpuino_pipistrello_lx45van.build.f_cpu=96000000Lzpuino_pipistrello_lx45van.build.core=zpuinozpuino_pipistrello_lx45van.build.mcu=zpuzpuino_pipistrello_lx45van.build.toolchain=zpuzpuino_pipistrello_lx45van.build.board=ZPUINO_PIPISTRELLOzpuino_pipistrello_lx45van.build.extra_flags=-D__ZPUINO_PIPISTRELLO__ -DBOARD_ID=0xba011a00 -DBOARD_MEMORYSIZE=0x800000 -nostartfileszpuino_pipistrello_lx45van.build.extraSflags=-DBOARD_ID=0xba011a00zpuino_pipistrello_lx45van.build.mcu=zpuzpuino_pipistrello_lx45van.build.vid=0x0403zpuino_pipistrello_lx45van.build.pid=0x6010zpuino_pipistrello_lx45van.build.usb_product="Pipistrello FPGA"zpuino_pipistrello_lx45van.bitloader.tool=papilioprogzpuino_pipistrello_lx45van.bitloader.file=lx9/zpuino-1.0-PapilioPro-S6LX9-Vanilla-1.0.bitzpuino_pipistrello_lx45van.xise.file=circuit/PSL_Papilio_Pro_LX9.xisezpuino_pipistrello_lx45van.sch.file=circuit/Papilio_Pro.schzpuino_pipistrello_lx45van.pdf.file=circuit/schematic_papilio_pro.pdfzpuino_pipistrello_lx45van.bit.file=circuit/LX9/papilio_pro.bitzpuino_pipistrello_lx45van.logicanalyzer.file=logicanalyzers/LX9/papilio_pro.bitzpuino_pipistrello_lx45van.logicanalyzer.message="Channels 0-15 are connected to the B Wing and channels 16-31 are connected to the C Wing."

Note that I changed the default upload.speed to 115200

Works a charm

 

Best regards

Kalle Kempe

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Hi All,

 

Since I wrote the last entry in this thread I've been poking around with the boards and I've found out that I need to have a zpuinocode already present in the flash for the uploads to work in designlab. This is a bit of trouble if the .bit file from the Xilinx tools is switched out alot..

 

I do not know if there is something I'm missing, perhaps Alvie can fill in some info?

 

Best Regards

Kalle Kempe

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One trick that might or might not be of use:  Maybe you can put the zpuino .bit file on the flash, and load all your other .bit files directly to the FPGA (non-persistently)?

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