mkarlsson Posted August 25, 2014 Report Share Posted August 25, 2014 A driver for Pipistrello OLS is now part of the sigrok code. See http://www.sigrok.org/blog/new-better-openbench-logic-sniffer for more info. Magnus Link to comment Share on other sites More sharing options...
alvieboy Posted August 25, 2014 Report Share Posted August 25, 2014 very good. Link to comment Share on other sites More sharing options...
awallin Posted October 23, 2014 Report Share Posted October 23, 2014 is the sample-rate still limited to 200 MHz? Does that vary with the number of pins sampled? Link to comment Share on other sites More sharing options...
mkarlsson Posted October 23, 2014 Author Report Share Posted October 23, 2014 The FPGA code is based on the Open Bench Logic Sniffer but using DRAM to buffer the samples instead of the internal BRAM, everything else is pretty much the same including the sample rate (32 channels up to 100 MHz, 24 channels up to 100 MHz, 16 channels up to 200 MHz and 8 channels up to 200 MHz). I think it should be possible to make a version that does 16 channels up 200 MHz and 8 channels up to 400 MHz but you would need to either hack JaWi's SUMP client or modify the Sigrok driver to support this. Magnus Link to comment Share on other sites More sharing options...
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