Papilio board support in Xilinx tools (like impact/chipscope etc.)


mkarlsson

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Or any other Xilinx FPGA board with an FTDI chip with MPSSE-engine connected to the JTAG pins (like Pipistrello but not Mojo or Saturn).

This is using the xilinx virtual cable driver.  Playtag is written by Patrick Maupin.

 

Steps:

1) you need python 2.7 installed.  Get it here:http://www.python.org/getit/

2) unzip the attached zip file playtag.zip somewhere on your computer

3) open a cmd-window and cd to <playtag>\tools\jtag

4) connect your Papilo board to the computer

5) type xilinx_xvc.py ftdi, this will report the available FTDI ports.You should see the A and B ports of the Papilio board (see image).

6) type xilinx_xvc.py ftdi 0, this will start the xilinx virtual cable server on the A port of the Papilo board

7) you can now use impact and chipscope etc. by selecting the xilinx_xvc plugin.  Use this plugin settings: xilinx_xvc host=localhost:2542 disableversioncheck=true

 

See attached images and zip file.

Do a google-search for xilinx_xvc for more info on how to use the virtual cable driver.

 

Magnus

 

post-36465-0-53601400-1390958321_thumb.p

post-36465-0-91965400-1390958338_thumb.p

playtag.zip

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Not really, the protocol isn't openly published but if you ask Xilinx they will give it to you. http://www.xilinx.com/products/intellectual-property/xvc.htm

 

It's super-simple, just 3 commands (getinfo:, settck: and shift:) of which the last one is doing all the work.  It basically gives you the number of bits to shift, the tms and tdi bit vectors to shift in, and expects the resulting tdo bit vector in return, that's it.  settck: sets the clock rate and getinfo: is asking for the xvc service version.

 

An alternative to playtag is xvcd ( https://github.com/tmbinc/xvcd/tree/ftdi ) but it uses FTDI bitbang instead of MPSSE.  However, I find the xvcd c code easier to read than the playtag python code.

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Woahhhhhh!!!!!!!!! Magnus, you are the man! Thank you very much for posting this.

 

I asked Xilinx  repeatedly for this a couple years ago and never got anywhere, they must have finally softened up and released the information. When I asked how digilent made their driver they said they reverse engineered it and I would have to do the same. Anyway, not to complain, we have something now and that is very exciting!

 

Thank you again for posting this.

Jack.

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  • 2 months later...
  • 4 weeks later...

I'm glad I found this thread. It helped me figure out why I couldn't get the port B serial channel to work. I added the Papilio Pro to my FGPA collection and so things were a little different with this one for me. I normally used the Xilinx programmer before, but when I scored a great deal on the Xilinx SP601 with the Spartan 6 - I started using the USB to JTAG port on that. Even their XP601 dev bd is compatible with the Xilinx ISE, they do use a convoluted approach in their hardware just to get USB connectivity - too many parts. But I thought all USB to JTAG ports were the same. 

 

I loaded the Hello World program from here http://papilio.cc/index.php?n=Papilio.GettingStarted . But the serial port wasn't working. I had thought the drivers that Windows installed were correct, when it detected the new Papilio Pro board. I should have suspected something. I didn't see any mention on the Papilio Pro webpages about installing the FTDI drivers first. See the Windows device manager said that the Dual RS232 driver was installed, but only the Papilio Pro Com port was available - this is how I downloaded the Bit file - but not the USB Serial port. Then I came across this thread and only after I ran the "xilinx_xvc.py ftdi" did I notice that only the Port A serial channel was detected. 

 

Then I noticed the Papilio Pro beginners tips thread on here http://forum.gadgetfactory.net/index.php?/topic/1601-papilio-pro-beginner-tips/ where it mentions something about the problems with the windows drivers. But I found it strange that it doesn't mention to install the FDTI drivers first. I only found it by chance when they mention to try the FTDI USB View utility. So looking on FDTI's website for that tool, I came across the FDTI drivers. So I uninstalled the Windows drivers, and immediately installed the FTDI drivers. I now see both A and B ports detected with xilinx_xvc.py and both Com ports are shown in the Device Manager. 

 

Now the serial port is working fine and I see the Ascii table display in the terminal window besides the blinking Leds.

 

I also had no idea that the FTDI device wasn't supported by ISE until now. So I will give this new method a try with the python program to get Xilinx ISE to recognize this new dev bd. 

 

Dan

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  • 9 months later...

Not really, the protocol isn't openly published but if you ask Xilinx they will give it to you. http://www.xilinx.com/products/intellectual-property/xvc.htm

 

It's super-simple, just 3 commands (getinfo:, settck: and shift:) of which the last one is doing all the work.  It basically gives you the number of bits to shift, the tms and tdi bit vectors to shift in, and expects the resulting tdo bit vector in return, that's it.  settck: sets the clock rate and getinfo: is asking for the xvc service version.

 

An alternative to playtag is xvcd ( https://github.com/tmbinc/xvcd/tree/ftdi ) but it uses FTDI bitbang instead of MPSSE.  However, I find the xvcd c code easier to read than the playtag python code.

 

Do you have a specification of getinfo: and settck: commands? I wrote a xvc server based on xvcd, but it only uses shift: command and that's enough for iMPACT, but not enough for Vivado. And I have problems contacting Xilinx...

 

Piotr

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getinfo command:

getinfo:

The service returns the following string: "xvcServer_v1.0:<xvc_vector_len>\n" where xvc_vector_len is the max width of the vector

 

settck command:

settck:[period] where [period] is a little-endian integer value specifying the period in ns.

The service returns the value when it completes "settck:".

 

Magnus

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getinfo command:

getinfo:

The service returns the following string: "xvcServer_v1.0:<xvc_vector_len>\n" where xvc_vector_len is the max width of the vector

 

settck command:

settck:[period] where [period] is a little-endian integer value specifying the period in ns.

The service returns the value when it completes "settck:".

 

Magnus

 

Thanks :)))

 

What is this vector width? Maximum number of bits that a single 'shift:' command can accept?

 

Piotr

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Correct

After some debugging I found: it's number of bytes, not bits :) I.e. I have 2048-byte buffer for both TMS and TDI vector, so I have to reply 1024, not 8192 (otherwise Vivado tries to send too long messages and my server crashes).

 

Now it works with Vivado :) although sometimes Vivado crashes, most of the time I need to reopen target or reconnect to server - but I'm connected to remote FPGA anyway :)

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  • 4 months later...

Please forgive this act of thread-necromancy. I thought it would be helpful to append a brief HOWTO for current Linuxes.

 

Thanks, works like a charm after adapting playtime a bit to work on 64bit Linux Systems.

 

In modern x86_64 Linuxes, remember to do the following first:

sudo cp ftd2xx.h WinTypes.h /usr/include/
  • copy over the libraries to the correct location and create standard abbreviated links:
sudo cp build/x86_64/libftd2xx.so.1.1.12 /usr/lib64/sudo ln -s /usr/lib64/libftd2xx.so.1.1.12 /usr/lib64/libftd2xx.so.1.1sudo ln -s /usr/lib64/libftd2xx.so.1.1.12 /usr/lib64/libftd2xx.so.1sudo ln -s /usr/lib64/libftd2xx.so.1.1.12 /usr/lib64/libftd2xx.so

or if you are still using a 32bit kernel:

sudo cp build/i386/libftd2xx.so.1.1.12 /usr/lib/sudo ln -s /usr/lib/libftd2xx.so.1.1.12 /usr/lib/libftd2xx.so.1.1sudo ln -s /usr/lib/libftd2xx.so.1.1.12 /usr/lib/libftd2xx.so.1sudo ln -s /usr/lib/libftd2xx.so.1.1.12 /usr/lib/libftd2xx.so
  • change the library to be used to the proper 64bit-lib on x86_64 in playtag/cables/ftdi/d2xx_wrapper.py
if windows:    libfile = 'ftd2xx'    loader = ctypes.WinDLLelse:    libfile = '/usr/lib64/libftd2xx.so'    loader = ctypes.CDLL    if not os.path.exists(libfile):        libfile = os.path.join(os.path.dirname(__file__), 'libftd2xx.so')
  • If you are using ftdi-spi or ftdi_sio, you will now run into
# sudo python tools/jtag/xilinx_xvc.py ftdi 0FTDI Driver error in function FT_Open: FT_DEVICE_NOT_OPENED (3)

Thus, remember to unload the relevant kernel module first:

sudo rmmod ftdi_sio

Have fun and thank you, mkarlsson!

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  • 6 months later...
  • 8 months later...

Hello

There is no problem connecting to impact with this method, but when i try to use chipscope pro analyzer (JTAG Chain -> Open Plug-in), i face this error in command window:

"jtag directory\xilinx_xvc.py", line 94, in cmdproc assert cmdinfo.cmdstr == 'shift:', cmdinfo.cmdstr 

Assertion Error : ^

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xvc supports three types of commands - getinfo:, settck: and shift:getinfo: can be used by the program to ask about target info, settck: can be used to set the jtag clock frequency, and shift: is used for all jtag data transfers.  (See above in the thread for more info about the commands.)  In impact, if you set disableversioncheck=true like the instruction says then impact will not send the getinfo: command, and if you don't change the default jtag clock frequency then the settck: will not be sent either, so the only command impact will send is the shift: command.  The playtag python script assumes this is true and will only respond to the shift: command, and has asserts that will fire if it gets any other command besides the shift: command.  What you see is this assert firing, so chipscope pro has obviously sent either the getinfo: command or the settck: command.  In order to use the playtag script with chipscope pro you either need to make chipscope pro not send those commands (like the disableversioncheck=true setting in impact) or update the playtag script to also support those commands. 

BTW, I did not write the playtag script, Patrick Maupin wrote it. See https://github.com/pmaupin/playtag .

Also, xvcd might be an alternative to use.  See https://github.com/tmbinc/xvcd/tree/ftdi .

Magnus

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