The next generation Papilio - help me shape it.


Jack Gassett

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Like most things in life, matching trace length is a double edged sword. (The exception being single edged swords, I guess).  If you add wiggles to match lengths then you add discontinuities due to the corners, you open up more room for noise to get in, but you have lower clock skew.

 

http://www.altera.com/literature/wp/wp_lvdsboard.pdf recommends matching within 5mm.

 

You also have to take into account what you will be plugged in on top. If you run those traces away from the FPGA you will even out some of the extra distance...

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Guys, lets keep in mind that the limiting factor here with the HDMI is not going to be the routing but rather the memory. We are looking at between 512K-2MB of 8-bit SRAM memory... No matter how perfect I make the routing we will never be able to probably even do 480p...

 

I plan to include the HDMI in the prototypes to see what we can accomplish, but the reality may be that HDMI gets dropped from the final production board due to the limited memory available.

 

Its a trade off between the easy to use SRAM that so many people are requesting and the more plentiful SDRAM or DDR.

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Wow just had a look at the sources of the new board, I didn't realize you went to 4 layers! I know it's work in progress still, but just a hint, if you nudge some traces around you can allow the copper pour to flood currently empty areas although this isn't a biggie, you have an entire layer of unbroken ground. Also I know I'm being anal, but some traces look unnecessarily wavy like the one highlighted below, I'd have optimized it a bit :)  Well done though, this looked like a real pain to get routed.

 

post-29560-0-12557700-1392531071.png

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I was so excited to be done with the initial place and route that I think I made it seem like the design was done. :)

 

I actually have a lot of work left for the verification phase. I generally look at every pin of every chip, inspect every trace on the board to see if it can be improved, and check all the power planes. I'll be starting that today. 

 

Dan,

I'm using the very latest version of EAGLE, they changed to xml files recently. If it's not opening then I'm guessing you have an older copy of EAGLE.

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I'm using the very latest version of EAGLE, they changed to xml files recently. If it's not opening then I'm guessing you have an older copy of EAGLE.

Yes, they changed to XML files with version 6.  It was a genius move on Cadsoft's part; once you switch, it's almost impossible to go back, so everyone who wants to work with new designs has to pay the upgrade fee.  Unfortunately, my system is too old to run version 6 ("Your Mac is more than two years old?  eww!  Throw it away and get a new one..."), so I'm stuck until I stop buying FPGA development boards long enough to save up the money for a new computer... :lol:

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Wow just had a look at the sources of the new board, I didn't realize you went to 4 layers! I know it's work in progress still, but just a hint, if you nudge some traces around you can allow the copper pour to flood currently empty areas although this isn't a biggie, you have an entire layer of unbroken ground. Also I know I'm being anal, but some traces look unnecessarily wavy like the one highlighted below, I'd have optimized it a bit :)  Well done though, this looked like a real pain to get routed.

 

attachicon.gifbenchy_1.PNG

 

Ok, I reworked that line to make 3.3V fill nicer, thank you for pointing that out:

post-29509-0-82935200-1392748465_thumb.p

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Ok, it would be nice to do something fancy with the silkscreen layers and color scheme for this board. Something to make it pop out...

 

The top is pretty busy, but the bottom silkscreen is pretty wide open... Need to start thinking about it, any ideas are appreciated.

 

For the name of the board I'm not thinking Benchy anymore, instead I'm leaning towards DUO or Duet.

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Yes, they changed to XML files with version 6.  It was a genius move on Cadsoft's part; once you switch, it's almost impossible to go back, so everyone who wants to work with new designs has to pay the upgrade fee.  Unfortunately, my system is too old to run version 6 ("Your Mac is more than two years old?  eww!  Throw it away and get a new one..."), so I'm stuck until I stop buying FPGA development boards long enough to save up the money for a new computer... :lol:

 

1) switcing to xml enables other software to read the files, not locked in to cadsoft anymore.

2) Really two year old mac cannot run this?, my computer is from 2007 and runs it very smooth.. 

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1) switcing to xml enables other software to read the files, not locked in to cadsoft anymore.

That's the theory, yes. Have you ever heard of anyone actually doing that? And you can/could use a ULP to convert anyway...

 

Don't get me wrong, I love EAGLE.  Maybe it's because I'm part German!  :wub:

 

2) Really two year old mac cannot run this?, my computer is from 2007 and runs it very smooth..

No, I have a seven year old Macbook myself (the two years in my quote reflects my impression of the typical Apple fanboi), and I'm one generation too old on the OS.  It's not in front of me right now, but it's the first intel-based Macbook running either OS X 10.4 or 10.5.  It's also too old to do iOS development as well (only 32 bits or likesuchas).

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(It's just a bit hard to justify an $500+ upgrade fee to get text files.)

 

There's a free edition if you don't plan to design boards with more than 2 layers and over 4x3 inches? Even so, if you download the free edition you can view the new format files even if you can't edit them. As for the PC being too old, there's not much we can do about that, sometimes you just have to move with the times. I'm not too clear on why even an old clunker can't run the latest Eagle, it's not exactly heavy on resources.

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There's a free edition if you don't plan to design boards with more than 2 layers and over 4x3 inches? Even so, if you download the free edition you can view the new format files even if you can't edit them. As for the PC being too old, there's not much we can do about that, sometimes you just have to move with the times. I'm not too clear on why even an old clunker can't run the latest Eagle, it's not exactly heavy on resources.

I own the full Professional version of EAGLE 5, so I already have most of what EAGLE 6 does.

As for the old clunker and EAGLE 6, the program wouldn't even start under my version of OS X, it just threw an error.  I think it's only a problem on Macs, you can run EAGLE on older Linux and Windows systems with no problem, and of course, EAGLE 5 still works fine on all the computers I use.  (Next time, I won't bother with a Mac.)

 

BTW, the hobbyist license is a *GREAT* deal at $169...

 

And FWIW, I've got two young adult kids, so money doesn't always get spent the way I would like it to...   ;)

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Jack,

 

I have Eagle 6.4.0, and can't read the files :(

 

-Dan

 

You're doing it wrong. Open the files with a text editor and check that they are in fact proper XML files. Here is the first 8 lines of the schematic file, if you don't see exactly those lines, you have a rubbish file.

<?xml version="1.0" encoding="utf-8"?><!DOCTYPE eagle SYSTEM "eagle.dtd"><eagle version="6.5.0"><drawing><settings><setting alwaysvectorfont="no"/><setting verticaltext="up"/></settings>

And here is 6.4 opening the schematic just fine:

 

post-29560-0-85787800-1392799326_thumb.j

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I would like to see the mounting holes moved a good distance from the headers and adjacent traces.  While it might be much, I have always liked how computer motherboard mouning holes are designed, there tends to be an eigth inch or more clearance around the screw head.  Mounting holes seem to get neglected with open hardware.

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If I were to invest time in learning anything other than Eagle, and I had to finance it myself, I would probably go with KiCad. It's open source, free as in all kinds of beer and speech, and seems fairly capable.

The workflow is a little different; you don't assign footprints for components until you go from schedule to board, rather than building libraries with footprints paired. Also, there seems to be some minor redraw glitches that are annoying.

Bonus: Runs on many OS-es.

 

SIncerely,

 

jw

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Kicad is great for what it is.  One thing I really like about it is that, since there is a one way work flow, it's easy to take a schematic and make multiple board layouts from that schematic.  EAGLE has backward annotation, so it isn't as easy to make multiple layouts, but EAGLE has the advantage that if you change (some) things on the board, they are annotated back onto the schematic.  With Kicad you have to go back to the schematic, modify things, regenerate the netlist and re-run cvpcb to get the changes.  Nothing really wrong with either way, it's just what you prefer...
 
Depending upon what platform you're on, and what tools you want to work with, you might also consider gEDA, Diptrace, Rimu or FreePCB as well.  And if you're just trying to have a couple prototypes made, I know several people who are really happy with ExpressPCB.
 
Just for grins, you could cruise http://www.opencollector.org/ and see what they have listed...

 

(I've never used Designspark, but I've heard good things.  My first thought was that Newark/Farnell bought EAGLE, so RS wanted to have their own program...  LOL)

 

EDIT: I see that they're still working on scripting support in Kicad.  I've really *REALLY* gotten used to being able to script things with EAGLE...

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