Jack Gassett

Papilio SOC (Build System on Chip with Schematic Editor!)

57 posts in this topic

Hey everyone,

 

From the very beginning the goal for the Papilio was to make it the Arduino of FPGA development. To me that means that anyone, of any skill level should be able to do cool things with it from the very beginning. It's been several years of work now and I don't really feel that goal has been accomplished... The missing piece of the puzzle, which has been my dream from the very beginning, is to allow any skill level to make custom Arduino compatible SOCs with custom peripherals . The trip up so far has been the VHDL learning curve, it just isn't beginner friendly. :) What we need is a bridge that allows people to pick up a Papilio and build their custom designs without learning a line of VHDL. Then as they become comfortable with all of the concepts they can start tackling VHDL when they need it. After years of interacting in the forums, and seeing first hand what peoples experiences are as they start out I think I finally see the light at the end of the tunnel!

 

Anyone can get up and running if we setup an easy to use and understand solution using the schematic editor. New users can get started right away after following a quick start guide and can do all the amazingly powerful things that are available with an FPGA without the overhead of learning VHDL. Anyone can draw schematics!

 

Here are the goals for the Papilio SOC system:

  • Provide schematic symbols for the ZPUino, AVR8, and any future Soft Processors we want to include.
  • Create a library of Wishbone peripherals such as VGA controllers, Stepper controllers, Delta-Sigma DACs, UARTs, etc.
  • Write Arduino libraries to support those Wishbone peripherals
  • Write documentation for the Wishbone cores and the supporting libraries.

A new user with zero experience would be able to drag and drop a ZPUino symbol onto the schematic editor and then drag and drop whatever peripherals they need onto the wishbone slots. Next they connect the external I/O pins, update the ucf file, and they are ready to synthesize their custom design! Need two UARTs? Just drag and drop two uarts into the wishbone slots...

 

Next they would fire up the Arduino IDE and in the define section they would add the library they need and specify what wishbone slot that library should communicate with. Voila! A custom Arduino compatible system that anyone of any skill level can design and use!

 

I'm super excited about this because I just got the proof of concept system up and running. Take a look at a screenshot of the schematic:

post-29509-0-05679000-1359960232_thumb.p

 

And here is what the sketch to drive this custom SOC design looks like (this is without a library and just writes the registers of the stepper core directly)

To see what the registers for the wishbone stepper core do look at the reference here.

 

#define STEPPER1BASE IO_SLOT(5)#define STEPPER1REG(x) REGISTER(STEPPER1BASE,x)void setup(){//Setup and start stepper1  //Set Timebase  STEPPER1REG(1) = 0x08;  //Set Period  STEPPER1REG(2) = 0x07D0;  //Set Step Count (steps before interupt)  STEPPER1REG(3) = 0x04;  //Set Control Register (Starts motor and does interupt after 4 steps  STEPPER1REG(0) = 0x1F0;void loop(){ }

 

Here is a video of the new Papilio SOC in action:

http://youtu.be/qwE7Uu8_w6A

 

For those brave souls who want to give it a try the source code is available on Github or a direct download here.

 

Please stay tuned as I continue working out the details, any feedback is greatly appreciated.

 

Jack

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I think you're on the right track. If designing is simplified to choosing components from predefined libraries, the learning curve seems gentler.

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Anyone can get up and running if we setup an easy to use and understand solution using the schematic editor. New users can get started right away after following a quick start guide and can do all the amazingly powerful things that are available with an FPGA without the overhead of learning VHDL. Anyone can draw schematics!

 

I wouldn't say all the amazingly powerful things that are available with an FPGA.

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I wouldn't say all the amazingly powerful things that are available with an FPGA.

 

I wrote this post after a marathon hacking session pretty late at night. :) That is pretty vague, I should find a better way to say that. :)

 

Jack.

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Wow, that is going to make a very powerful prototyping system for the Papilio. I'm going to go read up on the Wishbone spec, should be fun to design a few wishbone peripherals.  What software are you using for the schematic editor?  Eagle?

 

 

P.S.  Do you have an ETA on when you might have more stock of the Arcade MegaWing? I'd really like to buy one :)

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Wow, that is going to make a very powerful prototyping system for the Papilio. I'm going to go read up on the Wishbone spec, should be fun to design a few wishbone peripherals.  What software are you using for the schematic editor?  Eagle?

 

 

P.S.  Do you have an ETA on when you might have more stock of the Arcade MegaWing? I'd really like to buy one :)

 

The schematic editor is the ISE Webpack schematic editor, that way more advanced users can still contribute to the system without having to design with a schematic editor. :)

 

The Arcade MegaWing just went back in stock at Seeed Studio, but order quick because they are shutting down for Chinese New Year on the 7th.

 

Jack.

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I have never tried the ISE editor, I use Altium at work. I'll have to give that a spin.

 

 

 

The Arcade MegaWing just went back in stock at Seeed Studio

 

Sweet! 

 

Thanks again.

 

Rob

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Oh, you are lucky! Altium is way cool, but far too expensive. One of my first FPGA boards was the Altium LiveDesign board.

 

Jack.

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:D Ha, I still have my board laying around too! Haven't touched it in over 5 years... Ever since my Altium trial expired.

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When I started, Altium was the cheaper of the design tools. Back then it was called Protel. Compared to a seat for Cadence or Mentor it was cheap! 

 

Also, I don't have a copy at home, to expensive like you said. I use Eagle if I need to do anything at the house.

 

Since I skipped the whole FPGA thing for so long, I would actually like to check out one of the "Altium LiveDesign" boards. I looked on the net to get an idea what they cost, but nobody is selling one anymore, and I have no idea what they are worth. Hit me with a price, and if I can budget that in, I'll take it. 

 

Rob

 

P.S. Sorry for derailing your thread Jack, that wasn't my intention.

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neat project jack.  think you can upload a video of the end result also ? eg uploaded to fpga running the 7seg

 

EDIT::

 

Thanks Jack; Looks great.

 

(edited this post so as not to bump your post down)

Edited by Felix

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Pretty cool.  Is this just generating HDL behind the scenes? If so, it'd be nice to have a split window where you could see the HDL being generated on the fly.  I think it'd be a pretty good learning tool that way.  Training wheels for HDL.

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I think the Xilinx thing can generate HDL from a schematic.  The components themselves are all written in HDL and the schematic is literally just there to wire them together.

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Exactly, you can "push" into any of the schematic symbols and see/modify the HDL underneath it. This really is training wheels for HDL. :)

 

Jack.

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Thanks Jack! This is very cool. For myself, I am far more comfortable with sch design and I can see this as a bridge to VHDL.. Having complex cores in a sch lib opens up allot of quick implementation ideas!

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Do I need to get a specific version of ISE? I see logic version, DSP version, embedded version, ect. Also will the eval version work for this? It looks really cool, and I think I'm brave enough to try it and see what happens. I don't think I can use it long term, as it looks like it's a $3k price tag for the real version. I also don't have a papilio board yet, but would like to play with the software some to get a feel for what I might expect. Right now I'm trying to get a feel for what's needed to use the papilio for something. I don't currently know how to do the equiv of hello world. 

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Hello,

 

Yes, the free webpack version is exactly what you want. The linux version should work just fine as well.

 

Jack.

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I finally got the webpak installed, I'll start with a question, um, what next? I have the webpak installed, and have copied the files from github. I'm now trying to figure out how to open ISE, and the files from github do not seem to be associated with the xilinx, so it doesn't fire off the correct program if I simply try to open them.

 

Here are some notes about where I'm at. 

 

-- PC is a 2 core 64 bit Dell D620 Intel® Core2 CPU T5600 @ 1.83GHz Ubuntu 64x 11.01

-- You first want to create an account with xilinx. Don't use bugmenot, as it eventually won't allow you to get the licence. 

-- Download the webpak, it's around an 8 gig download. I used the multi file download, as my net connection is garbage. I found it seemed to work OK if I only downloaded one file at a time. 

-- I then changed to the director with the downloads, and extracted "here" via right click the .tar file. This consumes another 3 gigs. 

-- With a terminal program change to this folder extracted in the line above. Then sudo ./xsetup The install takes about 22 gigs during install, and about 18 after installed. 

-- It asks a bunch of questions, make sure to select webpak. After questions, it took about 15 minutes to install. 

-- Download the SOC project from github if you haven't already done so. 

 

This is where I'm at now. I'm trying to open the project and play with it. I think I need to open one of the .sh files under /opt/xilinx, but I don't know what to open. Once I have that open, I think I can open the git hub files. 

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Ok, so this is linux then... I remember having the same problem, it is not at all clear how to start the Xilinx tools after you install them! I think there should be an ise executable under /opt/xilinx/bin or something like that, it's been a while since I ran webpack on linux. I'm pretty sure you need to locate the ise executable but maybe someone that has run the xilinx tools more recently can verify the exact command.

 

Once you have project navigator (ise) running you should be able to open the project under example_SOCs/Papilio_SOC_Base

 

Thank you for your patience with this, I intend to start work on an eBook and package this up nicer soon. Right now its just a proof of concept with no documentation.

 

Jack.

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I don't mind not having documentation, and I can offer my help in creating it. I'll likely ask questions as I fumble along and I understand it's not a finished or polished product yet. It's young and maturing nicely. From my view of things, I would like to encourage you to focus more on the embedded parts and less on the higher level documentation. I can probably figure out the basic hip bone and leg bone kind of stuff, and it's probably good for me to play around and see what I learn from fumbling around. I can also offer to help with simpler aspects of this project like documentation. The embedded parts, are likey to be much harder for me. 

 

I'm trying to keep a list of the major steps as I fumble through this, such that it can potentially work as a kind of "how to" check list, or some kind of sequential reference of how one goes from nothing, to doing something with this project. Ah, it appears I just found the executable. I found it here, (however for 32 bit linux the lin64 would just be lin.)

 

/opt/Xilinx/14.4/ISE_DS/ISE/bin/lin64/ise

 

Hmmm, I don't see the tools --> Symbol Library Manager. It's noted in the help file, but I don't see it at all in the pull down, or any of the sub pull downs. So I'm fumbling around with that. Also I keep getting this "locate missing source files" dialog. it's looking for

/blah/example_SOCs/Papilio_SOC_Base/Papilio_Default.vhd   and 

/blah/Papilio_System_On_Chip-master/example_SOCs/Papilio_SOC_Base/LogicStart_MegaWing.vhd

However I don't find them in the files I downloaded. 

 

The help --> "about" notes Project Navigator 14.4

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The Symbol Library Manager won't be available until you have a schematic opened, maybe that is why you don't see it?

 

Looks like I'm missing files from github, for now try to download the zip file from this post:

http://forum.gadgetfactory.net/index.php?/topic/1550-building-complete-papilio-soc-for-logicstart-megawing/

 

Jack.

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