Source control / ISE


jbb

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Using the xilinx ISE package with VHDL, but want to store my code in git.
There are many, many files in the directory, does anyone know which I need to store in order to have a working system?

Obviously my .vhd and .ucf files, and .xise appears to be a project file? Are there any others I need to save? And what about generated IP components? It's not clear what i need to store for those.


Anyone got any ideas or experience of this?

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