OmniTechnoMancer

Loading the SPI Flash on the Papilio Pro

25 posts in this topic

Hi,

I recently purchased a Papilio Pro and RetroCade Synth wing from SeedStudio.

When I attempt to program a bit file to the SPI flash the loader complains that the flash manufacturer is unknown, what do I need to do to program the SPI Flash on the Papilio Pro?

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Hello OmniTechnoMancer,

You probably have an old version of the Papilio Loader installed. Check out this page to get started with the RetroCade Synth. If you download the latest RetroCade Synth Installer, linked on the getting started page, it will upgrade your Papilio Loader to 2.3 which has support for the larger chip.

Let me know if there are any issues, you are one of the first people to get the RetroCade hardware. I'll be in the chat room to help you through any problems.

Jack.

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Hi Jack,

I also appear to have the same issue. I am on Windows 7-64. The installer installed Java and the loader works great with my Papilio One 500K (and is a nice upgrade from the older "cygwin" script version I was using), but doesn't appear happy with my new Papilio Pro. I am trying to program the RetroCade synth bit-stream ("RetroCade-1.01-zpuino-1.0-PapilioPro-S6LX9-RetroCade-1.0.bit"). Currently the RetroCade only functions as a fixed-speed metronome with the Papilio Pro default "blink" bit-stream. :-)

It appears to detect the Papilio Pro, but as with OmniTechnoMaster for some reason it doesn't seem to recognize the flash ROM (but I think the problem not just that). Here is what is says in the message box when I try to program SPI flash:

=========================================

JTAG chainpos: 0 Device IDCODE = 0x24001093 Desc: XC6SLX9

Using devlist.txt

JTAG chainpos: 0 Device IDCODE = 0x24001093 Desc: XC6SLX9

Using devlist.txt

Uploading "C:\Program Files (x86)\Gadget Factory\Papilio Loader\programmer\bscan_spi_xc6slx9.bit". Done.

Programming time 547.0 ms

Programming External Flash Memory with "D:\Users\KenJ\Downloads\RetroCade-1.01-zpuino-1.0-PapilioPro-S6LX9-RetroCade-1.0.bit".

Uknown Flash Manufacturer

Error: SPI Status Register [0x00] mismatch (Wrong device or device not ready)..

Error occured.

USB transactions: Write 171 read 4 retries 0

JTAG chainpos: 0 Device IDCODE = 0x24001093 Desc: XC6SLX9

Using devlist.txt

ISC_Done = 0

ISC_Enabled = 0

House Cleaning = 1

DONE = 0

==============================================

If I select just "write to FPGA", it pretends to program (and takes a while like it is working), but it still keeps on blinking (i.e., no RetroCade bit-stream). I find it odd there is no verify error. It says this:

==============================================

JTAG chainpos: 0 Device IDCODE = 0x24001093 Desc: XC6SLX9

Using devlist.txt

Uploading "D:\Users\KenJ\Downloads\RetroCade-1.01-zpuino-1.0-PapilioPro-S6LX9-RetroCade-1.0.bit". Done.

Programming time 4773.0 ms

USB transactions: Write 1452 read 2 retries 0

==============================================

I will also mention I had an initial "fright" when my Papilio Pro didn't power on correctly. As another poster mentioned, the power jumper on top was very lose. I think the poly-bag the PPro ships in is a tight squeeze through the poly-bag opening in ships in, with the pins on back and the jumper on front (I bent a couple of header pins getting mine out if the bag too). After adjusting the power jumper header pins it appears to be fine now.

I really like my Papilio One 500K (along with ArcadeMegaWing and LogicStart) and look forward to the increased BRAM, DRAM and other features on the Pap-Pro. :-) I am still in the middle of a little project with my Papilio One, so this isn't time critical for me to get worked out (but I wanted to give you another "field report").

Thanks for making the Papilio!

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Is there any source code for any of this, or any information on how the loader works?

Mostly I'm just interested for it's own sake so nothing urgent

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Hmm, I seem to be having the same problem. The same exactly command line papilio-loader executable that I used to be able to program all my Papilios on my old Win 7 x64 PC (slower, single core type) no longer works since I upgraded to a quad core. I've also tried the latest version 2.3 with no success. I have tried easily about 20 times in a row and it fails every time (no error, it seems to succeed but the FPGA code doesn't get uploaded). Trying to erase the eeprom always fails. I also tried it on a laptop, dual core, it failed about 10 times and worked once.


C:\Users\alex\workspace>papilio-prog.exe -b bscan_spi_lx9.bit -s e
Using devlist.txt
JTAG chainpos: 0 Device IDCODE = 0x04001093 Desc: 0x0009
Uploading "bscan_spi_lx9.bit". Erasing External Flash Memory.
Uknown Flash Manufacturer
Error: SPI Status Register [0x00] mismatch (Wrong device or device not ready)..
Error occured.

On the other hand, I have tried xc3sprog compiled for windows and it works every time. Unfortunately github seems to be down for maintenance right now so I can't grab the source code, bad luck. You might be right Jack, perhaps drop the JTAG speed down a bit.



C:\Users\alex\workspace>xc3sprog.exe -v -c ftdi bombjack_papilio_lx_lvds\build\bomb_jack_top.bit
XC3SPROG (c) 2004-2011 xc3sprog project $Rev: 646 $ OS: Windows
Free software: If you contribute nothing, expect nothing!
Feedback on success/failure/enhancement requests:
http://sourceforge.net/mail/?group_id=170565
Check Sourceforge for updates:
http://sourceforge.net/projects/xc3sprog/develop

Cable ftdi type ftdi VID 0x0403 PID 6010 dbus data 00 enable 0b cbus data 00 data 00
Libusb not found, expect failure
Could not open FTDI device (using libftdi): usb_find_busses() failed
Using FTD2XX, Using JTAG frequency 1200000
Using devlist.txt
JTAG chainpos: 0 Device IDCODE = 0x04001093 Desc: XC6SLX9
Created from NCD file: BOMB_JACK_TOP.ncd;UserID=0xFFFFFFFF
Target device: 6slx9tqg144
Created: 2012/12/23 14:14:06
Bitstream length: 2724832 bits
DNA is 0xb99dc9c86e74a6fe
done. Programming time 2324.4 ms
USB transactions: Write 177 read 8 retries 0

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I think I know what's causing this. I ran into the same problem on Pipistrello and traced the source of the problem. Some time ago there was a change in one of the files (progalgxc3s.cpp) that removed a section of code at the end of the array_program function that needs to be there. The purpose of the code is to wait for the downloaded bscan_spi bit file to come up before proceeding with the spi programming. Without the wait there is a race condition - if the device is not up when the spi program starts up then you will get the "Unknown Flash Manufacturer" message. On an LX9 part, this is a close race and the part might or might not come up before the PC start the spi programming. On LX16 and up it will always fail. xc3sprog still has the wait code, that's why it works.

Here is the code that needs to be there:

/* Wait until device comes up */

while ((( buf[0] & 0x23) != 0x21) && (i <50))

{

jtag->shiftIR(&BYPASS, buf);

jtag->Usleep(1000);

i++;

}

if (i == 50)

fprintf(stderr,

"Device failed to configure, INSTRUCTION_CAPTURE is 0x%02x\n",

buf[0]);

I have an updated version of papilio-prog v2.3 that has the wait. It also has support for more parts (Micron and Winbond parts) and an added cmd-line option (-d) that will allow you to specify the FTDI chip used which is handy if there is more than one FTDI chip connected or if the B port is used. I believe this code should also work for Papilio Pro but I can't verify that since I don't have a Pro board. The code can be downloaded from the pipistrello web page: http://pipistrello.saanlima.com

There are two versions - the win version has a make file for compiling on a Windows PC using minGW/msys (and has a windows exe file), while the linux version has the same structure as the original version for compile or cross-compile on a linux box.

Magnus

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Cool thanks, I tested it and it reliably uploads a bitstream to the FPGA though it can't erase the eeprom on neither Papilio/Papilio Pro.

EDIT: Sorry Magnus, I had mixed up the FPGA / bscan files. Your version erases the eeprom fine on a Papilio Pro with bscan_spi_lx9_qfp144.bit


alex@evil /c/Users/alex/Downloads/papilio-prog-win
$ ./papilio-prog.exe -b bscan_spi_lx9_qfp144.bit -s e -v
Using built-in device list
JTAG chainpos: 0 Device IDCODE = 0x04001093 Desc: XC6SLX9
Uploading "bscan_spi_lx9_qfp144.bit". DNA is 0xb99dc9c86e74a6fe
Done.
Programming time 545.0 ms
Erasing External Flash Memory.
Found Macronix Flash (Pages=32768, Page Size=256 bytes, 67108864 bits).
Erasing :
............................Ok
Verifying :
.......................................................................
........Pass
Done.
SPI execution time 52655.9 ms
USB transactions: Write 32976 read 32807 retries 0

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Great!.

I see you use msys too. The code is now very easy to compile on windows using msys, just type make. No need for autogen, automake, autoconfig, perl, aclocal, etc, etc, etc, it's now just a simple cpp compile.

This version of papilio-prog has a list of enhancements and bug fixes as well. Here is a list:

* New cmd-line option (-d) that allows you to specify the FTDI device. This was asked for in this forum.

* Spartan-6 LX4 - LX45 parts are added to the built-in device list

* The fpga wait-code is put back

* The code now supports many more flash parts

* The number of pages in the Macronix part is corrected (32768, not 250000)

* Misc corrections here and there in the code

* The erase-before-programming is now handled by a new routine (Spi_PartialErase) that tries to be smarter about the erase. For the parts used by Jack (SST and Micronix) it still erases the whole chip (I didn't want to mess with the Papilio use) but only verifies that the area needed by the bit file is erased (for speed improvement). On the generic parts (Micron, Winbond etc) the routine uses block erase so that only the the area used by the bit file is erased and verified. This will greatly improve the erase time on large parts (like the 128 Mbit Micron chip) and also allow the flash to be used for other things (in my case the Linux kernel) since that part is now left intact after a bit-file flash update. It would be easy to use the same partial-erase code for the Macronix flash but I didn't want to change how the code works for Papilio Pro. The erase-only command (like what you used above) is still erasing and verifying the whole chip on all flash variants.

Magnus

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Just a quick note for others, if you add the -static flag to the Makefile linker stage, the executable produced can be run as a standalone command line app outside of the Msys environment such as in a CMD (DOS) window.

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Good point! I uploaded a new version of papilio-prog-win with a statically linked executable and the -static flag added to the makefile.

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By the way the latest xc3sprog can be built on windows without the need for msys, it uses a cmake build system and only requires that you have libftdi, you can then also use libftd2xx from the papilio prog folder.

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Great!.

I see you use msys too. The code is now very easy to compile on windows using msys, just type make. No need for autogen, automake, autoconfig, perl, aclocal, etc, etc, etc, it's now just a simple cpp compile.

This version of papilio-prog has a list of enhancements and bug fixes as well. Here is a list:

* New cmd-line option (-d) that allows you to specify the FTDI device. This was asked for in this forum.

* Spartan-6 LX4 - LX45 parts are added to the built-in device list

* The fpga wait-code is put back

* The code now supports many more flash parts

* The number of pages in the Macronix part is corrected (32768, not 250000)

* Misc corrections here and there in the code

* The erase-before-programming is now handled by a new routine (Spi_PartialErase) that tries to be smarter about the erase. For the parts used by Jack (SST and Micronix) it still erases the whole chip (I didn't want to mess with the Papilio use) but only verifies that the area needed by the bit file is erased (for speed improvement). On the generic parts (Micron, Winbond etc) the routine uses block erase so that only the the area used by the bit file is erased and verified. This will greatly improve the erase time on large parts (like the 128 Mbit Micron chip) and also allow the flash to be used for other things (in my case the Linux kernel) since that part is now left intact after a bit-file flash update. It would be easy to use the same partial-erase code for the Macronix flash but I didn't want to change how the code works for Papilio Pro. The erase-only command (like what you used above) is still erasing and verifying the whole chip on all flash variants.

Magnus

Magnus,

This is great! It's like an unexpected Christmas present. :) I've been battling a stomach flu so I did not get a chance to respond until now, but I'm very excited about this. It has all the things that I've always wanted but never had the time to work on. For the Macronix chip I would want to do a partial erase, that has been the biggest thing on my To do list for papilio-prog. It takes 1 minute to do the full chip erase, partial erase should cut that down to something more reasonable.

Thank you very much, I will start integrating it and make a new release of papilio loader once I'm 100% again.

Jack.

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Excellent.  The app works beautifully for me now with my Papilio Pro.

 

Thanks Magnus and Jack!

 

-Xark

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I seem to have a similar issue when loading SPI flash running Papilio loader 2.5 on win7:

 

JTAG chainpos: 0 Device IDCODE = 0x24001093 Desc: XC6SLX9
Using devlist.txt
JTAG chainpos: 0 Device IDCODE = 0x24001093 Desc: XC6SLX9

Uploading "C:\Program Files (x86)\Gadget Factory\Papilio Loader\programmer\bscan_spi_xc6slx9.bit". DNA is 0x19593271861591fe
Done.
Programming time 564.0 ms

Programming External Flash Memory with "E:\FPGAProjects\Timing\processor_top.bit".
Found Macronix Flash (Pages=32768, Page Size=256 bytes, 67108864 bits).
Erasing    :
Doing Partial Erase
......Ok
Verifying  :
......Pass
Programming :
..Error: SPI Write Check Status Register [0x00] mismatch (Wrong device or device not ready)..
Error: SPI Write Check Status Register [0x00] mismatch (Wrong device or device not ready)..
Error: SPI Write Check Status Register [0x00] mismatch (Wrong device or device not ready)..
Error: SPI Write Check Status Register [0x00] mismatch (Wrong device or device not ready)..
Error: SPI Write Check Status Register [0x00] mismatch (Wrong device or device not ready)..
....Ok
Verifying  :
.Error in Verify: first byte of data [0xFF] ..
Using devlist.txt
Failed (@ Page: 198)
Error occured.
USB transactions: Write 5711 read 5543 retries 0
JTAG chainpos: 0 Device IDCODE = 0x24001093 Desc: XC6SLX9

Using devlist.txt
ISC_Done       = 1
ISC_Enabled    = 0
House Cleaning = 1
DONE           = 1

 

 

loading the FPGA works fine.

 

not sure if any solution has been indicated. Can someone summarize the solution?

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Hello,

 

Can you try to use a shorter USB cable, that has cleared up problems like this for a couple people. Does this exact same behavior occur every single time or is it intermittent? Do you get any successful writes to SPI Flash?

 

Jack.

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Thanks Jack getting back so quick.

 

I tried it five times.  Three times on a Win7 machine and two on a XP machine. Each with a 16" cable plugged directly into the computer. All failed but with slightly different results. see below:

 

1_______________________________________________

 

 

JTAG chainpos: 0 Device IDCODE = 0x24001093 Desc: XC6SLX9
Using devlist.txt
JTAG chainpos: 0 Device IDCODE = 0x24001093 Desc: XC6SLX9

Uploading "C:\Program Files (x86)\Gadget Factory\Papilio Loader\programmer\bscan_spi_xc6slx9.bit". DNA is 0x19593271861591fe
Done.
Programming time 664.0 ms
Erasing External Flash Memory.
Found Macronix Flash (Pages=32768, Page Size=256 bytes, 67108864 bits).
Erasing    :
...........................Ok
Verifying  :
..........................Error in Verify: first byte of data [0x00] ..
Using devlist.txt
Failed (@ Page: 6433)
Error occured.
USB transactions: Write 6638 read 6470 retries 0

 

2_______________________________________________

 

 

JTAG chainpos: 0 Device IDCODE = 0x24001093 Desc: XC6SLX9
Using devlist.txt
JTAG chainpos: 0 Device IDCODE = 0x24001093 Desc: XC6SLX9

Uploading "C:\Program Files (x86)\Gadget Factory\Papilio Loader\programmer\bscan_spi_xc6slx9.bit". DNA is 0x19593271861591fe
Done.
Programming time 664.0 ms

Programming External Flash Memory with "E:\Timing\processor_top.bit".
Found Macronix Flash (Pages=32768, Page Size=256 bytes, 67108864 bits).
Erasing    :
Doing Partial Erase
......Ok
Verifying  :
......Pass
Programming :
..Error: SPI Write Check Status Register [0x00] mismatch (Wrong device or device not ready)..
.Error: SPI Write Check Status Register [0x00] mismatch (Wrong device or device not ready)..
Error: SPI Write Check Status Register [0x00] mismatch (Wrong device or device not ready)..
Error: SPI Write Check Status Register [0x00] mismatch (Wrong device or device not ready)..
Error: SPI Write Check Status Register [0x00] mismatch (Wrong device or device not ready)..
Error: SPI Write Check Status Register [0x00] mismatch (Wrong device or device not ready)..
...Ok
Verifying  :
.Error in Verify: first byte of data [0xFF] ..
Using devlist.txt
Failed (@ Page: 22)
Error occured.
USB transactions: Write 5531 read 5363 retries 0
JTAG chainpos: 0 Device IDCODE = 0x24001093 Desc: XC6SLX9

Using devlist.txt
ISC_Done       = 1
ISC_Enabled    = 0
House Cleaning = 1
DONE           = 1

 

3_______________________________________________

JTAG chainpos: 0 Device IDCODE = 0x24001093 Desc: XC6SLX9
Using devlist.txt
JTAG chainpos: 0 Device IDCODE = 0x24001093 Desc: XC6SLX9

Uploading "C:\Program Files (x86)\Gadget Factory\Papilio Loader\programmer\bscan_spi_xc6slx9.bit". DNA is 0x19593271861591fe
Done.
Programming time 663.0 ms
Erasing External Flash Memory.
Found Macronix Flash (Pages=32768, Page Size=256 bytes, 67108864 bits).
Erasing    :
............................Ok
Verifying  :
Using devlist.txt
..............................................................Error in Verify: first byte of data [0x00] ..
Failed (@ Page: 15768)
Error occured.
USB transactions: Write 15974 read 15806 retries 0

 

4_______________________________________________WINXP:

JTAG chainpos: 0 Device IDCODE = 0x24001093 Desc: XC6SLX9
Using devlist.txt
JTAG chainpos: 0 Device IDCODE = 0x24001093 Desc: XC6SLX9

Uploading "C:\Program Files\Gadget Factory\Papilio Loader\programmer\bscan_spi_xc6slx9.bit". DNA is 0x19593271861591fe
Done.
Programming time 2393.4 ms

Programming External Flash Memory with "Z:\TIMING\processor_top.bit".
Found Macronix Flash (Pages=32768, Page Size=256 bytes, 67108864 bits).
Erasing    :
Doing Partial Erase
......Ok
Verifying  :
......Pass
Programming :
......Ok
Verifying  :
.Error in Verify: first byte of data [0xFF] ..
Using devlist.txt
Failed (@ Page: 55)
Error occured.
USB transactions: Write 5563 read 5395 retries 0
JTAG chainpos: 0 Device IDCODE = 0x24001093 Desc: XC6SLX9

Using devlist.txt
ISC_Done       = 1
ISC_Enabled    = 0
House Cleaning = 1
DONE           = 1

5_______________________________________________WINXP:

 

 

JTAG chainpos: 0 Device IDCODE = 0x24001093 Desc: XC6SLX9
Using devlist.txt
JTAG chainpos: 0 Device IDCODE = 0x24001093 Desc: XC6SLX9

Uploading "C:\Program Files\Gadget Factory\Papilio Loader\programmer\bscan_spi_xc6slx9.bit". DNA is 0x19593271861591fe
Done.
Programming time 681.0 ms

Programming External Flash Memory with "Z:\Timing\processor_top.bit".
Found Macronix Flash (Pages=32768, Page Size=256 bytes, 67108864 bits).
Erasing    :
Doing Partial Erase
......Ok
Verifying  :
......Pass
Programming :
......Ok
Verifying  :
..Error in Verify: first byte of data [0xFF] ..
Using devlist.txt
Failed (@ Page: 283)
Error occured.
USB transactions: Write 5794 read 5626 retries 0
JTAG chainpos: 0 Device IDCODE = 0x24001093 Desc: XC6SLX9

Using devlist.txt
ISC_Done       = 1
ISC_Enabled    = 0
House Cleaning = 1
DONE           = 1

 

 

 

Notice try #2 went a little further, got into programming!

 

Do the dots in "Verify" indicate progression? if so the are slightly different.  Always fails to write SPI and works on FPGA writes. I have used the FTDI parts before and they have not been sensitive to cable length.

 

Thanks,

Craig

 

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Craig,

 

You are right, it was a bit of a shot in the dark. I think we better replace your board, I wanted to rule out any kind of computer or cable problems. But the most likely culprit is a problem with the soldering between the FT2232 and FPGA's jtag lines. It was probably good enough to pass the factory testing but causing you grief now.

 

If you can please send an email to support@gadgetfactory.net with your mailing address and a link to this forum thread we will get you a replacement.

 

Thanks,
Jack.

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I have recently experienced this issue with my SPI flash on my own custom board. I was able to program it just a couple days ago, but now it fails with the exactly same error:

Uknown Flash Manufacturer (0x00)
Error: SPI Status Register [0x00] mismatch (Wrong device or device not ready).. 

The interesting point is that it can be programmed by xilinx IMPACT without any problem, So I dont think that this could be a hardware issue.

my software is FPGAprog from magnus with a little modification to support Winbond parts. the code is very similar to papilio-loader although.

any idea please?

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This basically means that the data returned from the flash is 0.

As you said, if it works with iMPACT then it's most likely not a hardware problem.  Could it be that you are using a bscan_spi_xxx bitfile designed for xc3sprog with fpgaprog?   The fpgaprog/papilioprog bscan_spi_xxx files are incompatible with the bscan_spi files designed for xc3sprog and you would definitely not get the correct data back if you use the wrong bscan file.

Magnus

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magnus,

Thank you for the point. I checked it with the bscan files under /bscan_spi_spartan6 inside your git repo (Tools_src). it worked without any problem! But It does not work with papilioprog bscan files!!

Update: Altought the configuration files can be successfully programed on the spi flash thanks to new bscan files, but the zpuinoprogrammer fails to identify the flash! while with the old bscan, it does not have this issue! :(

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The only difference between my version of the bscan files and the papilioprog bscan files is that I also drive flash_wp and flash_hold.  The flash chip on Pipistrello can do quad-spi mode where flash_wp and flash_hold are used as data lines. The pullups on the board for those two lines are too weak to overcome the default spartan6 pulldown on unused pins so I define them as inputs.

See attached file.

Magnus 

 

bscan_spi_spartan6.vhd

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Thank you magnus.

I can now figure out why your bscan works and the others not! I have the same conditions on my board: Qspi flash and weak pull-Ups. 

regards,

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