Jack Gassett

Introducing Benchy, the Swiss Army knife for electronics.

15 posts in this topic

So I've been thinking about making this product for years now but I've really been thinking more about it over the last couple months. Then out of the blue I got a great email from Paul G. who hit me at just the right time and sparked off a week of intense design work to get the ideas into an actual PCB.

Benchy is meant to be an electronics multi-tool, a Swiss Army knife if you will, for the electronics workbench. It's purpose is to be the most flexible and useful hacking/debugging tool on the planet. :)

Here are the things that I envision doing with the Benchy:

  • Basic Logic Analyzer (running the OLS improvements) with a high speed USB chip so we can implement a real time mode that captures indefinitely at speeds up to 24Mhz.
  • Run the Logic Analyzer and a soft processor in parallel and put the Logic Analyzer under control of the soft processor. People can use any of the huge library of arduino sketches to interface with any piece of electronic equipment out there. But, with the Benchy they can simply include the Logic Analyzer library to their sketch and use simple commands to connect logic analyzer probes to the equipment they are already connected to and accessing with their sketch. The connection happens inside the FPGA and the Logic Analyzer core runs in parallel with the Soft Processor running the sketch. The end result is people can run Arduino sketches like they are used to doing and have the power of a high speed Logic Analyzer for debugging.
  • Any FT2232 based project should work transparently with the benchy. Benchy uses a FT232H which is a single channel MPSSE capable chip. Any project out there that uses MPSSE such as flashrom and openocd (to name a few) will work with benchy. The cool thing is we will be able to connect the MPSSE pins to ANY pin of the benchy through the FPGA. We will be able to program flash chips, debug JTAG connections, program microcontrollers, program FPGA's. You name it and there is probably already a project out there that uses a FT2232 to do it, and it will work transparently with the Benchy.
  • Benchy will be extensible through the use of Wings or what I am tentatively calling PODS, which are like shields. Wings will be used for ala carte functionality (that only needs a couple pins) like debugging infrared with the IR Wing. PODS will be used for a targeted application such as the Control POD application, an OScope application, a Flash Programmer application, or anything that needs a lot of pins (up to 40).
  • The use of Soft Processors, like the ZPUino, will be a big part of the picture with the Benchy and will allow us to do very advanced things without having to resort to VHDL. Using C instead of VHDL will open up the ability to customize and extend the Benchy's feature set to a larger group of people. One such example will be VGA output, the ZPUino has a VGA controller built into it. When the Control POD is connected to the Benchy a VGA connector and micro-joystick becomes available. Given time we should be able to write C code to make an interface to present the data from the Logic Analyzer as a standard VGA output. This would allow the Benchy to be used without being tethered to a computer.
  • Frequency generator, I have already implemented a nice frequency generator that can be plugged into the ZPUino and can do sin, cos, square, and saw waveforms on any pin.

The hardware features are:

  • Spartan 6 LX9 which provides around ~70KB of BRAM.
  • FT232H USB 2.0 capable of 480Mb/s which is fully connected to the FPGA.
  • 32 or 64Mb SPI Flash chip that will allow multi-boot of up to 11 different bit files.
  • Bidirectional bus switches used to provide 5V tolerance on 16 of the I/O pins.

Design features:

  • Small size, the design is 3.1"x1.8"
  • 3 8-bit Wing Slots of which two create a 16-bit Wing Slot.
  • PODS, which are like shields, allow anyone to make an addon that can use up to 40 pins.

So please take a look at the following posts where I will provide pictures and design files for review before sending the PCB's to be manufactured.

Control POD

Thecontrol pod is an example of an addon board that uses the 24 auxillary I/O pins leaving the 16 5V tolerant pins free.

Its hardware features are:

  • 8x2 Character LCD
  • Micro-Joystick
  • VGA output
  • 8 channel 12-bit SPI ADC capable of 1Msps

It can be used for:

  • Controlling frequency generator core without being connected to computer. Select sin, cos, saw, square waves and the frequency and which pin they are output on.
  • Measuring ADC values without a computer.
  • Creating a Logic Analyzer interface without a computer.

Why not do this with the OpenBench Logic Sniffer?

People might wonder how this will be different from the OLS or why don't I use the Wing header on the OLS. The Logic Sniffer was designed to be a Logic Analyzer and nothing else, when Ian and I designed it we ran a power report and saw that the LA design hardly used any power at all. Since our only goal was to make a nice Logic Analyzer and nothing more we used voltage regulators that only provided 100ma of power to the board. It was more then enough for the LA application but is not anywhere near enough to power the LA core coupled with the AVR8 or ZPUino soft processors. The other factors that make the OLS unsuitable for a multi-tool are:

  • Only 16 free I/O pins, to make a flash programmer we really need 40 I/O pins.
  • We used a one way voltage translator on the LA pins which means we can't OUTPUT anything onto those pins.
  • Coordinating between the PIC chip and the FPGA adds a lot of complexity to any new apps. Any new app needs to have code for the FPGA and the PIC chip which becomes cumbersome.
  • The USB is only capable of low speeds, we need USB 2.0 480Mb/s to do many of the things envisioned for the Benchy.

These factors have all led me to making the Benchy!

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Design files:

Attached is a template for anyone who wants to make a custom POD.

Also attached are pdf versions of the schematics for the Benchy and the Benchy control POD.

Any review or feedback is greatly appreciated, I intend to send these designs off to be manufactured in the next couple of days.

Jack.

Benchy-Pod-Template.zip

Papilio_Benchy.pdf

Benchy-Control-Pod.pdf

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Looking great. I was pondering over buying an ols, but I'll definitely wait for this one.

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Nice to read the details. A neat design.

Can you please explain how to select between different flash bit patterns. I guess you will also use one of these patterns to flash the chip itself? You are planning to use flashrom for the flashing, right?

The current order of the 3V3 and 1V2 rails at power-up and power-down is compatible with the FPGA reliability specs I guess?

Will the 2nd row of pins on the right (logic analyzer side) be used for extensions?

The out-of-the-box FT2232 compatibility is a good direction I think. What controller block will decide which block gets exclusive access to the bus? And how to control this controller? Maybe interesting to combine this with a Wishbone interface?

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Can you please explain how to select between different flash bit  patterns. I guess you will also use one of these patterns to flash the  chip itself? You are planning to use flashrom for the flashing, right?

I started working on the multi-boot selector here:

http://www.gadgetfactory.net/gadgetforum/index.php?topic=305.msg939#msg939

It is based on the following Xilinx reference design:

http://www.xilinx.com/support/documentation/boards_and_kits/xtp059.pdf

The first, golden bit file will be locked in SPI Flash and will implement the functionality to program the rest of the SPI Flash chip. Not sure what will be used yet, whatever is the path of least resistance. Could be:

  • Flashrom
  • papilio programmer
  • ZPUino programmer
  • urjtag

The current order of the 3V3 and 1V2 rails at power-up and power-down is compatible with the FPGA reliability specs I guess?

I've never seen a problem with the power up order. From what I remember reading about it in the datasheet, which was a long time ago, I concluded that it wasn't a concern for this application.

Will the 2nd row of pins on the right (logic analyzer side) be used for extensions?

The outside row will be populated with a right angle male pin header that will allow the Benchy to be plugged directly into a breadboard, perpendicular to the breadboard, or to plug probes in. The inside set of pins is meant for female headers so PODs can plug in and have access to all 40 pins.

The out-of-the-box FT2232 compatibility is a good direction I think.  What controller block will decide which block gets exclusive access to  the bus? And how to control this controller? Maybe interesting to  combine this with a Wishbone interface?

Not sure yet, it depends on the application I suppose. I'm thinking of a couple different possible schemes:

  • ZPUino controls all communications and the application is smart enough to request which peripheral to communicate to.
  • A multiplexer controlled by free GPIO pins of the MPSSE channel can select which core is connected to the serial chip.

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Not sure yet, it depends on the application I suppose. I'm thinking of a couple different possible schemes:

  • ZPUino controls all communications and the application is smart enough to request which peripheral to communicate to.
  • A multiplexer controlled by free GPIO pins of the MPSSE channel can select which core is connected to the serial chip.

I am planning to do something similar on the Papilio board. I will route one of the MPSSE GPIO pins to the FPGA to separately address the Wishbone USB controller to instruct it to route the UART packets to a specific Wishbone core when back in normal mode (in addition to the existing manual control). I am thinking of using GPIOL0 for the time being as it is available on both the FT2232D and the FT232H. Any other preference?

And what do you think: is the (supply of the) OLS capable to run your AVR8 softcore?

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I am planning to do something similar on the Papilio board. I will route  one of the MPSSE GPIO pins to the FPGA to separately address the  Wishbone USB controller to instruct it to route the UART packets to a  specific Wishbone core when back in normal mode (in addition to the  existing manual control). I am thinking of using GPIOL0 for the time  being as it is available on both the FT2232D and the FT232H. Any other  preference?

Well, unfortunately that will not work with the Papilio One or the Papilio Plus. I/O is at a premium with both boards and there was not enough spare I/O to fully connect the FT2232 chip. So, none of the GPIO pins are connected to the FPGA. Only the pins that are required for operation were connected.

index.php?action=dlattach;topic=427.0;attach=224

And what do you think: is the (supply of the) OLS capable to run your AVR8 softcore?

I wouldn't even try it. I've been asked several times and its not something I would support. My concern is that it probably could be made to work, but with only 100mA of current available there are going to be all kinds of phantom errors cropping up. People would get excited and start trying to use it, then we will be faced with chasing down phantom problems that are caused by a lack of current. Everything will synthesize, compile, and load... But when things don't work people will be scratching their heads. I think it will lead to a situation that we will not be able to support and people will not understand that maybe a very simple AVR8 without any peripherals will work. But when you start adding I/O and peripherals it will draw more power and it is difficult to tell when you have exceeded the available 100mA power. Ultimately it will not be stable or supportable and the end result could be damaging to the Papilio project. If people have a bad experience with the AVR8 on the OLS they may think it will be the same on the Papilio.

post-3-13431627493455.png

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For the Papilio I was thinking more of glueing an additional 1pin female header to the board which is connected to one of the GPIO pins on the FT2232D (lets say GPIOL0 for the moment). In that way I can wire-connect this header to the LPC wing and multiplex this to the existing button on the wing. Basically to add automatic USB control as an optional bonus feature to the wing.

Good point about the OLS. With the existing power supply it will probably be best to leave this board unsupported. By the way, what about a tutorial on your website to upgrade that power supply?

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I'm really hoping this project is still going to happen. I keep hoping to see something new in this particular topic -- something that will make me start playing the "how can I find a way to justify the cost of this thing to my wife?" game.

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Well, I have PCB's on hand to build prototypes, but this is going to be a pretty big project that will take a lot of effort. Before I can start working on it in earnest I need to get the RetroCade code to more of a maintenance/new features state and finish up a bunch of other little projects. This will probably be a middle of the year project once I get my plate cleared a little more.

 

Jack.

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Well, cool. I understand the part about getting the other projects down to a dull roar before being able to continue.

 

I just wanted to make sure that this product was still a possibility. You make cool things, and I want to buy those cool things.

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I deleted the last post, I'm all for the community talking about other boards and building discussion threads about them. But I guess I have to draw the line at other companies posting free advertisement for their board in the forum. Please keep in mind, if it benefits the community it is fine, if it is an advertisement, no good. Making the community aware of your product is not something that I consider a benefit to the community. If someone else in the community says, "Hey, what do you guys think about this board." that's fine.

 

Jack.

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