FPGA radio


Guest monkeydoo

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Guest monkeydoo

If anyone is interested, the Eagle schematic and board layout are available here:

https://sites.google.com/site/mm6dos/mm6dos-adc-reva.zip

The only issue with the board that I know of is the SN74AVC16244 is reversed.  Luckly, it is symmetrical so you can just rotate it.  I have left it as is in the schematic. I don't recommend anyone build this just yet.  The board cost around $22 USD from BatchPCB.  The layout could be done better to reduce this of course.

There are some improvements to the digital down converter I wanted to implement but was just unable to fit them in the Papilio.  Number of fast-carry chains IIRC.  I have started to design a sort of "virtual clone" Papilio based upon an Altera Cyclone III EP3C25.  It is a much more attractive FPGA to me because of the sheer number of hardware multipliers in a QFP package.

Cheers,

Ian

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Ian,

I have started to design a sort of "virtual clone" Papilio based upon an Altera Cyclone III EP3C25.

Hey, that sounds cool. At one point I had envisioned a Papilio for every major FPGA on the market. Actually the first "Butterfly" version had the FT2232 as a base board and the S3E was a "Shield", which I called Cocoons, on top of it and then peripherals were meant to stack on top. I had meant to have FPGA and microcontroller Cocoons that could be swapped out and then Wings. But I dropped that approach because of the cost of the connectors and it was a lot to try and convince people of. The Papilio One was a compromise that was better accepted since people could look at it and did not need an explanation of how it works. :)

Anyway, it would be cool if you make a Altera Papilio format board. :)

Jack.

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Guest sa_penguin

Ouch, those ADC are expensive like hell.

ADC1010S (NXP) seem to be much cheaper. Why are you choosing ADS500?

I'd go for the LTC2258-12 series myself.

But then agaim, I'd use a superhet design and have an IF of 60 MHz. With an undersampling 48MHz ADC, that gives you a 12MHz signal - DDC's and filters in FPGA then give you the signal you want.

Downsampling improves SNR, too.

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Guest monkeydoo

The LTC2258-12's look nice.  Biggest problem for me is the QFN package.

I have a couple of MAX16588's 16bit/100MSPS in QFN which I will eventually design a board for.

I'd like to avoid any kind of IF.  That's the whole point for me.  Simple and *cough* cheap.  To me more bits in the ADC means less gain I need in front of it.

14 bits is probably good enough with a quiet enough board.  I noticed screenshots of people using WinRAD with devices like the Perseus showing the NF at  < -96db with 16 bit audio samples coming out the DDC.  Hmm... something funny there.

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  • 5 months later...
  • 1 year later...

I am interested in this topic also. I am looking for an inexpensive rf front end to drive into either a papilio 500 or arduino for a software radio reciever with a range from 30 kHz to 100 Mhz.  I would prefer to build myself for experimentation, I have been searching the net for a decent schematic for something low cost.  It appears you have a pretty good solution started. low cost and small package size would beinteresting for my project.  Any advice you could give would be appreciated.

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  • 1 year later...

Hi,

any update concerning this SDR project? Could anyone provide the source code perhaps. It seems many on this forum would like to experiment on this topic.

In any case a Papilio "SDR wing" would be a dream, in my opinion.

br

enrico

 

PS: youtube videos have been removed in the meantime...

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