Programming the flash using JTAG?


Guest essele

Recommended Posts

Hi,

I'm just playing with a new JTAG programmer on the Papilio One ... it seems to work ok with the FPGA itself but it doesn't like the flash.

I notice that the flash used isn't included in their iMPACT supported list, so am I right in assuming that there's no way to program the flash with JTAG, or is there some other way?

(BTW - I know it's much easier to use the USB interface, I'm just trying to understand!)

Thanks,

Lee.

Link to comment
Share on other sites

Hello Lee,

To make sure I understand, you have a Xilinx compatible JTAG device and are connecting it to the JTAG pins of the Papilio One and programming the FPGA that way? If that is the case then yes, you are right, Impact does not support programming the SST Flash chips.

The papilio_prog application (which is forked from xc3sprog) actually does program the SPI flash over the JTAG port. It uses the same method Impact does which is to load a special bitstream to the FPGA first. The bitstream uses the bscan primitive to make a connection from the jtag pins to the SPI flash. Then JTAG is used to load the data onto the SPI flash.

Take a look at xc3sprog they may have support for your jtag programmer or they might add it in the future. Is the jtag programmer you have the new one from digilent?

Jack

Link to comment
Share on other sites

  • 2 months later...
Guest niksgarage

Hello,

I'd be interested in the reply to this topic as well. My papilio arrived with a faulty on-board regulator - at least I think it must have been, since things got really warm when I plugged in a 12v power supply. I subsequently found the 5v regulator was shorted from input to output .. this has fatally damaged the 2232 and the nearby 93lc46B.

For what I need, I don't mind using the JTAG port - I have one of those excellent Chinese Xlinx USB programming cables from eBay, and at least having a fried 2232 guarantees it will stay open circuit during programming. But I do need to be able to load the bit stream into the SPI. I've already checked that IMPACT can find the FPGA, which it does (after much messing around with digilent drivers so that IMPACT didn't just bomb every time I woke up the device)

Can I use the indirect SPI programming method as in Xilinx XAPP974? BTW this is a non-Windows household, so I will be looking to run this development environment under Linux 64-bit.

Link to comment
Share on other sites

Hello niksgarage,

First of all, I'd be happy to replace your Papilio, send an email to support@gadgetfactory.net and we can work out the details.

I use the Xilinx JTAG cable with the Papilio from time to time, you can use the MProg application from FTDI to put the FT2232 into the "Opto-Isolated" mode and that will put it in a state where the FTDI frees up the JTAG programming pins for the Xilinx JTAG cable.

Impact has a Indirect SPI programming mode built in, I've used it in the past when I've been verifying new boards before the Papilio Loader supported the SPI programming ability. It works just fine if the SPI Flash chip is supported by Impact. The last time I looked at this functionality, probably back in ISE 11, the SST SPI Flash chip that we use with the Papilio was not supported by Impact... It has a different writing scheme then the other SPI Flash chips so it's harder to add support for it. Maybe things have changed and they added support, it is one of the chips that is documented in the S3E Datasheet...

If you are handy with a soldering iron it is possible to replace the SPI Flash chip with one that IS supported by Impact. Any of the MP25* series chips will work with the Papilio.

Hope this helps,

Jack.

Link to comment
Share on other sites

Guest niksgarage

Hi,

Many thanks for the kind offer to replace the board. I think I will pass for the time being, as I won't be using the USB port (except to provide 5v  ;) ), and I have soldered all of the headers on and all that. This is just my starter for ten, getting comfortable with the development environment, writing Verilog code and  and using constraint files, understanding the split between hardware design and firmware .. when I have got back up to speed with VLSI development I will be looking to get one of the new boards coming soon. I haven't done a decent bit of hardware development for 15 years that involves more than an AVR and a few latches.

You are right about the flash. Though it looks like it should work, the device is not selectable from the IMPACT drop-down, so I will probably take your advice and see if I can replace the chip. I did try an equivalent device, but clearly there is a manufacturer's code that doesn't match.

Link to comment
Share on other sites

The Papilio is configured for "Fast Read" capable devices which is outlined on page 78 of the Spartan 3E datasheet.

I'm attaching a screenshot of which devices should work. Any of the devices on the list that have the same pinout as the *25* devices should work. Basically, everything on the list except the AT45DB 'D' Series chip will work, and maybe the AT45DB 'D' chip will work but I would check the footprint first.

Jack.

post-3-1343162748622.png

Link to comment
Share on other sites

Guest niksgarage

Boundary-scan chain validated successfully.

'1': IDCODE is '8d' (in hex).

'1': ID Check failed.

INFO:iMPACT:2488 - The operation did not complete successfully.

INFO:iMPACT - SPI Device not found.

Unfortunately iMPACT takes the trouble to read the device ID - here it's found byte 3 of the JEDEC read id result and decided it's not what it was expecting .. time to change the chip! (or hack the code - no DMCA here).

Link to comment
Share on other sites

Guest niksgarage

FWIW - and for others considering the same, I did indeed replace the SPI flash on the board with an M25PE40, and all is working fine now. iMPACT recognises the SPI flash, I right-click on it and program it and away we go.

Many thanks for your help; I will be keeping an eye on the forum, and hopefully will have something to contribute in the future. My first step is a text-mode VGA controller which will be the control panel for a digital synth .. text mode since the internal RAM in the FPGA is more than enough for the display memory and the font memory - two sizes of characters. Then moving on to direct digital synthesis of surround sound audio with a digital mixer (as in digital audio input streams) ..

Link to comment
Share on other sites

Archived

This topic is now archived and is closed to further replies.