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Jack Gassett

AVR8 Project Page

4 posts in this topic

If the Open 8 risc is a arduino compatible & it is a verilog code that can be put into a xilinx schematic symbol.

I wonder if it is possible to load a bunch of these to have dedicated ones for dedicated calculations so things could be done more in parrellel. Like if it was a programmable chip that goes in a programmable chip..

signal 1 xilinx multiply schematic module etc... pin high for chip select on a arduinio softcore 1....

signal 2 xilinx multiply schematic module etc... pin high for chip select on a arduinio softcore 2....

How would I load code into eatch?

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Yes, it is possible to have multiple AVR8 cores in a project. But it will require the larger 500K Papilio One board, the AVR8 uses ~75% of the 250k chip.

If performance is the goal though I would take the approach of moving the functions that can be sped up in the hardware outside of the C code and implement it in VHDL instead.

The AVR8 core can also be clocked higher for more performance. Or upgrading to an alternative 32 bit soft processor should increase performance as well.

The AVR8 and Arduino compatibility is really meant to be used for easy control functions, then the FPGA can do the heavy lifting with VHDL modules.

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I'm with Jack, if you want processing power you don't run two 8-bit cores if you are running on top of a 500k gate array made exactly for speed and concurrency.

My approach to this would be to use Arduino/AVR8 core as a controller of the high speed functions written in vhdl. This is actually what I'm focusing on.  :D

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