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Found 7 results

  1. Papilio DesignLab IDE

    Version 1.0.8

    8,921 downloads

    We live in exciting times where we can create masterpieces with the Arduino and marvels with the Raspberry Pi. Where we can use technology as a canvas to create things that amaze and amuse our friends and family. Wouldn't it be great if we could take the same technology that has been the staple of rocket scientists and put it in our creative arsenal? Without the need tobecome a rocket scientist or the headache of learning a new programming language like VHDL/Verilog. Why can't we just draw up the circuits that we want to use? With the right software and circuit libraries we can! Let's put a full circuit lab on a chip, pair it with an easy to use Arduino-Compatible chip, and sprinkle in a generous helping of debugging tools. Our dream is to take the hardcore out of FPGA (Field Programmable Gate Array) and make it an amazing tool that anyone can use for creative technology projects. Just like the Arduino team simplified C++ programming, we simplify FPGA design by providing easy to use drag and drop circuit libraries. We believe that drawing circuits will result in an amazing outpouring of creative FPGA projects! We start with the Arduino IDE (Integrated Development Environment) and supercharge it by adding circuits into the mix. We bring all of the pieces needed to draw and debug your very own circuits in one place. It's an easy and seamless user experience that we call Papilio DesignLab for use with both Windows and Linux. Want to get into more complex circuits? DesignLab includes the ZPUino Soft Processor with a Wishbone bus, providing greater speed and flexibility than the Arduino-Compatible chip. A Soft Processor runs inside the FPGA and uses the Wishbone bus to make it easy to connect peripheral circuits, such as UARTs, PWMs or SPI masters. Making your own Soft Processor with just the right mix of peripheral circuits is known as a SOC (System On Chip) design. With DesignLab you can draw your SOC designs in minutes! Create SOCs with ten serial ports, or a PWM on every pin, or something exotic like classic Atari and Commodore audio chips connected at the same time. The sky is the limit, you can create things that don't exist anywhere else! DesignLab Circuit Library Drawing circuits can only accomplish so much without a library of circuits (known as cores) to do the heavy lifting. Our goal is to provide the framework for anyone to write a core that can be wired into a circuit. We want to seek out the best open source circuits on the interwebs and convert them to a dead simple schematic library. The internet is absolutely full of open source circuits; just take a look at sites like OpenCores.com. You will find everything from classic audio chips to stepper motor controllers. All of these amazing circuits are within our reach when converted to schematic form and included with DesignLab IDE!
  2. Hi. I am new to FPGA design (but an experienced electronics engineer). I am learning how to create simple designs on a Papilio One 500k with ISE schematics. I am familier with basic logic design, and so far I have created some simple combinational logic and a divider chain to produce a 10Hz clock. This works fine, but when after editing and add more bits on, the existing parts no longer function properly. The frustrating thing is that the schematics look correct, but they do not function as expected on the FPGA. After searcing the internet for answers, I suspect it might be something to do with net names or constraints, but that's as far as I have got. Can anyone point me in the right direction (I cannot be the only beginner have these problems!)? By the way, I am aware there are limitations in using schematics (compared with using Verilog or VHDL). I am developing this project for my college students and there will be insufficient time for them to learn an HDL, although I will of course give them an introduction to the subject. Many thanks for reading this.
  3. Hi, I am new to this forum. I am running a course on logic design and I want to include a practical introduction to FPGAs. I am considering Papilio as the platform to use as there will not be time to learn VHDL or Verilog. My students are already used to using schematic design tools such as Proteus. We are using Windows 10. Is Papilio the right solution? I understand that Xilinx have superseded ISE with Vivado (which is more complicated and does not allow schematic entry). How does this affect Papilio and DesignLab? Many thanks.
  4. Papilio DesignLab IDE

    View File Papilio DesignLab IDE We live in exciting times where we can create masterpieces with the Arduino and marvels with the Raspberry Pi. Where we can use technology as a canvas to create things that amaze and amuse our friends and family. Wouldn't it be great if we could take the same technology that has been the staple of rocket scientists and put it in our creative arsenal? Without the need tobecome a rocket scientist or the headache of learning a new programming language like VHDL/Verilog. Why can't we just draw up the circuits that we want to use? With the right software and circuit libraries we can! Let's put a full circuit lab on a chip, pair it with an easy to use Arduino-Compatible chip, and sprinkle in a generous helping of debugging tools. Our dream is to take the hardcore out of FPGA (Field Programmable Gate Array) and make it an amazing tool that anyone can use for creative technology projects. Just like the Arduino team simplified C++ programming, we simplify FPGA design by providing easy to use drag and drop circuit libraries. We believe that drawing circuits will result in an amazing outpouring of creative FPGA projects! We start with the Arduino IDE (Integrated Development Environment) and supercharge it by adding circuits into the mix. We bring all of the pieces needed to draw and debug your very own circuits in one place. It's an easy and seamless user experience that we call Papilio DesignLab for use with both Windows and Linux. Want to get into more complex circuits? DesignLab includes the ZPUino Soft Processor with a Wishbone bus, providing greater speed and flexibility than the Arduino-Compatible chip. A Soft Processor runs inside the FPGA and uses the Wishbone bus to make it easy to connect peripheral circuits, such as UARTs, PWMs or SPI masters. Making your own Soft Processor with just the right mix of peripheral circuits is known as a SOC (System On Chip) design. With DesignLab you can draw your SOC designs in minutes! Create SOCs with ten serial ports, or a PWM on every pin, or something exotic like classic Atari and Commodore audio chips connected at the same time. The sky is the limit, you can create things that don't exist anywhere else! DesignLab Circuit Library Drawing circuits can only accomplish so much without a library of circuits (known as cores) to do the heavy lifting. Our goal is to provide the framework for anyone to write a core that can be wired into a circuit. We want to seek out the best open source circuits on the interwebs and convert them to a dead simple schematic library. The internet is absolutely full of open source circuits; just take a look at sites like OpenCores.com. You will find everything from classic audio chips to stepper motor controllers. All of these amazing circuits are within our reach when converted to schematic form and included with DesignLab IDE! Submitter Jack Gassett Submitted 01/12/2015 Category Papilio FPGA  
  5. Ok, this is the most exciting release of the Papilio Schematic Library yet, things are really coming together! Get version 1.4 from the Papilio Schematic Library download page. What's new? Lots of cool new features: Benchy Waveform generator - generate sin, cos, and sawtooth waveforms. Note: I can use help testing this out at higher speeds, I only have a 70Mhz Oscope so can only test to around 7Mhz. Anyone out there with a faster Oscope care to test at higher speeds? Added a bunch of clock options - convert the 32Mhz clock to other standard speeds - 50Mhz, 100Mhz, 300Mhz, 960Mhz. HQVGA - Use the VGA library with this HQVGA adapter in your project. Works with LogicStat, 8-bit VGA Wing, Arcade MegaWing. VGA Wing - Symbol for 8 bit VGA Wing. Hyperion Soft Processor for Papilio One 500K. Hyperion uses less BRAM memory for program code so you can use the HQVGA adapter on a P1 500K. Sump Blaze Logic Analyzer - Add a logic analyzer to your project and debug external pins or internal FPGA logic. LogicStart MegaWing Symbol Wishbone Template - Use this to make your very own Wishbone peripheral using VHDL.Arcade MegaWing Symbol (untested)Here is a full list of all the schematic symbols available now: Benchy Logic Analyzer 8Benchy Waveform GeneratorMultiple clock generatorsHardwareLogicStart MegaWingAudio WingVGA WingArcade MegaWing (untested)Standalone PeripheralsAudiomixerDelta Sigma DACSplitter2Splitter4Wishbone PeripheralsYM2149 Audio ChipAudio PassthroughPokey Audio ChipC64 SID Audio ChipSPIUARTSeven Segment ControllerWishbone TemplateHQVGAHQVGA Character MapSoft ProcessorsZPUino Vanilla for Papilio OneZPUino Hyperion for Papilio OneZPUino Vanilla for Papilio Pro
  6. Papilio Schematic Library

    File Name: Papilio Schematic Library File Submitter: Jack Gassett File Submitted: 29 Oct 2013 File Category: Papilio FPGA A library of Soft Processors and peripherals that can be used with Webpack schematic editor to build a custom SOC for the Papilio. Click here to download this file
  7. Version 1.0

    1,212 downloads

    Build your own custom ZPUino System on Chip design using the Schematic editor! Just drag and drop the wishbone peripherals you want to design a ZPUino Soft Processor with exactly what you want and then program it with the ZAP IDE. Note: This works under Linux but there are bugs with the schematic editor that give mixed results.