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Found 2 results

  1. Hey there, I have been working in a dc motor control project. So far I got the motor running open loop pretty good (clockwise and counter clockwise), and now I wanna implement a closed loop speed feedback. I tried using the quadrature decoder to read the pulses coming from an quadrature incremental encoder. So this is what I read at approx. 1720 rpm Pulse Count 33133033 Speed -17034 Speed Radians: -36.43 Pulse Count 33130475 Speed -17296 Speed Radians: -36.16 Pulse Count 33127931 Speed -17003 Speed Radians: -36.05 Pulse Count 33125396 Speed -16801 Speed Radians: -37.98 Pulse Count 33122854 Speed -17035 Speed Radians: -36.73 Pulse Count 33120307 Speed -16784 Speed Radians: -36.69 It is negative because its rotating counter clockwise. Why is it too inaccurate? I have attached my project just in case someone wants to take a look at it. Thanks, P.D. The motor runs at 4000 rpm max. Encoder specs: 1000 ppr. A, B, and I.
  2. I wanted to decode a quadrature rotary signal, so I started with the quadrature decoder code from opencores,quadraturecount I was never able to get that code to count, even after ruling out other sources of problems So I modified the code in a way that made sense to myself, it turned out much shorter then the original and best of all it works correctly Yes, It's not enough that it works, I need outside confirmation that I did not do something bad. My question is, did I get lucky, and am I ignoring possible timing issues, race conditions? Under what conditions can I know that writing to a signal visible to outside circuits is safe? My head kind of hurts from thinking about it. Code follows, thanks library IEEE;use IEEE.STD_LOGIC_1164.ALL;use IEEE.STD_LOGIC_ARITH.ALL;use IEEE.STD_LOGIC_SIGNED.ALL;library work;--How we 'talk' to the outside world:entity QuadratureCounterPorts is Port ( clock : in std_logic; --system clock, i.e. 10MHz oscillator QuadA : in std_logic; --first input from quadrature device (i.e. optical disk encoder) QuadB : in std_logic; --second input from quadrature device (i.e. optical disk encoder) CounterValue : out std_logic_vector(23 downto 0); --just an example debuggin output setCount : in std_logic_vector(23 downto 0); writeEnable : in std_logic );end QuadratureCounterPorts;--What we 'do':architecture behave of QuadratureCounterPorts is signal Count : unsigned(23 downto 0); signal clockD : std_logic; signal Quad : std_logic_vector(1 downto 0); signal lastQuad : std_logic_vector(1 downto 0); function gray(a:std_logic_vector) return std_logic_vector isbegin if a="00" then return "00"; elsif a="10" then return "01"; elsif a="11" then return "10"; elsif a="01" then return "11"; end if; return "11";end function; begin --architecture QuadratureCounter -- do our actual work every clock cycle process(clock) begin --keep track of the counter if ( rising_edge(clock) ) then lastQuad <= Quad; Quad <= gray((0=>QuadA,1=>QuadB)); if((unsigned(Quad) = unsigned(lastQuad)+1)) then Count <= Count + 1; end if; if((unsigned(Quad) = unsigned(lastQuad)-1)) then Count <= Count - 1; end if; if(writeEnable = '1') then --Count <= unsigned(setCount); end if; end if; --clock'event CounterValue <= std_logic_vector(Count); end process; --(clock) end behave;