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Found 5 results

  1. Hi, is it possible that the usb_cts and usb_rts nets in the pipistrello.ucf constraint file are mixed up? In my opinion, the following should be correct: #NET "usb_cts" LOC = "A9" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ; // SWITCHED WITH RTS -mn #NET "usb_rts" LOC = "C10" | IOSTANDARD = LVTTL | PULLUP; // SWITCHED WITH CTS -mn Schematic: RTS# = pin 40 on U7 = D2 = C10 on FPGA CTS# = pin 41 on U7 = D3 = A9 on FPGA In my understanding (please correct if wrong) CTS serves double duty on the FTDI chip: - Setting 1'b1 (which mean "not clear to send") blocks incoming traffic from USB. - Any level change kicks off the current 62+2 byte package over USB without waiting for the latency timer. I did an experiment with existing code where triggering a pulse on CTS decreased the roundtrip time (for two "rounds") from 4.00 to 3.75 ms, a small but measurable improvement.
  2. Hello, I have tried to connect my XILINX Platform Cable USB to the Papilio Duo. To avoid interfere of the FTDI Chip and the programmer I changed the PORTA of the FTDI to optically isolated mode as described here: The device ID can be read out as shown there, but programming is not possible with the impact tool o Xilinx. The papilio loader works, when the platform cable is disconnected. In the end of the video the FTDI chip is resetted by erasing the EPROM completely with FT_PROG. I have several questions: - since the programming is not possible from impact using Platform Cable and, in my case, programming is also not possible with playtag ( from inside impact, what are possible adjustments to program from impact and to use chipscope? I consider removing FTDI Chip completely using hot air soldering and using Platform Cable solely. - The video shows resetting the FTDI completely by erasing the EPROM. This erases the complete intital configuration. I lost my backup file. Can you please provide the initial configuration file for FTDIs FT_PROG to be able to use Papilio Loader again? Can you please make a hint in the video that a save backup of the fie is necessary? Why is erasing the eprom an option? In my case the board is not programmable anymore. A short - but complete and correct – introduction on how to use the papilio duo board successfully from within ISE Webbench in combination with impact and chipscope would be a great help. I guess for some more people than me. Thank you very much.
  3. If I want to use the FTDI Port B of the FPGA USB port as a serial to USB converter connected to a PC, I understand that I have to use signals BD0 (TXD), BD1 (RXD), BD2 (RTS) and BD3 (CTS) mapped to pins 46, 141, 140, 138 of the FPGA (for full hw handshake). Am I correct ? Is there any interference with the normal Papilio Loader programming ? Regards, José Luis.
  4. Hi there, I'm on Ubuntu 14.04 and after much faff trying to get my PP to work, I think it is knackered. I get this when programming: Programming to SPI FlashUsing built-in device listCannot find device having IDCODE=00010440Unknown Papilio BoardUsing built-in device listCannot find device having IDCODE=00400400IOException: Cannot open file USB transactions: Write 4 read 3 retries 0Error while burning bitfile. The IDCODE fields seem to be random when I run papilio-prog several times. I assume that means the FTDI is mangling the serial data? Any ideas? I've also got a DUO. Works perfectly with this same setup. I tried installing the linux 'drivers' but these seem to just install libftd2xx which isn't even linked against the papilio-prog (which uses open source libfdti) AND doesn't contain a linux kernel module either so I don't understand their relevance to anything. It does have a libusb in there though. Haven't tried that, get the feeling it's not going to help things.. The default FTDI drivers in Ubuntu work fine after running, with the Duo. Minor note: Think it would be a good idea to remove all references to Spent a while searching the net for this script before discovering somewhere it is now Error msg in DesignLab 1.0.7 still refers to too. Kind Regards,Chris
  5. USB

    Hello Ihave some questions I want to connect a CCD and read large amounts of data to a PC. Can I use the existing USB and FTDI chip for this? Or should I connect a separate USB PHY chip ? If a PHY chip is needed would the following fit?