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Showing results for tags 'fpga'.
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Papilio Duo. Have Windows 10, for which the only ISE available is a virtual machine that runs on Oracle VM. I can run designLab on Win 10 and it will load AVR programs, but not FPGA. I cannot figure out how ISE on the VM would communicate with the DesignLab on Win 10. I have tried that VM, and cannot seem to get it to talk to the host machine USB interface. (some kind of libftdi problem) Can run DesignLab on Win 10 - but it won't load to the FPGA/ZPUino. Ran Windows 7 as a VM - it also will not talk to the USB-just hangs during upload. Has anyone found a combination that works for Windows 10, and allows FPGA to be loaded, (even just the Duo Quickstart example)?
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http://www.nxlab.fer.hr/fpgarduino/ The FPGArduino project provides pre-built software tools and FPGA configuration bitstreams which transform popular FPGA development boards into microcontroller systems programmable using the intuitive Arduino development environment. https://github.com/f32c/arduino If you like it you can support it by adding support for your board...
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Version 1.0.8
17,043 downloads
We live in exciting times where we can create masterpieces with the Arduino and marvels with the Raspberry Pi. Where we can use technology as a canvas to create things that amaze and amuse our friends and family. Wouldn't it be great if we could take the same technology that has been the staple of rocket scientists and put it in our creative arsenal? Without the need tobecome a rocket scientist or the headache of learning a new programming language like VHDL/Verilog. Why can't we just draw up the circuits that we want to use? With the right software and circuit libraries we can! Let's put a full circuit lab on a chip, pair it with an easy to use Arduino-Compatible chip, and sprinkle in a generous helping of debugging tools. Our dream is to take the hardcore out of FPGA (Field Programmable Gate Array) and make it an amazing tool that anyone can use for creative technology projects. Just like the Arduino team simplified C++ programming, we simplify FPGA design by providing easy to use drag and drop circuit libraries. We believe that drawing circuits will result in an amazing outpouring of creative FPGA projects! We start with the Arduino IDE (Integrated Development Environment) and supercharge it by adding circuits into the mix. We bring all of the pieces needed to draw and debug your very own circuits in one place. It's an easy and seamless user experience that we call Papilio DesignLab for use with both Windows and Linux. Want to get into more complex circuits? DesignLab includes the ZPUino Soft Processor with a Wishbone bus, providing greater speed and flexibility than the Arduino-Compatible chip. A Soft Processor runs inside the FPGA and uses the Wishbone bus to make it easy to connect peripheral circuits, such as UARTs, PWMs or SPI masters. Making your own Soft Processor with just the right mix of peripheral circuits is known as a SOC (System On Chip) design. With DesignLab you can draw your SOC designs in minutes! Create SOCs with ten serial ports, or a PWM on every pin, or something exotic like classic Atari and Commodore audio chips connected at the same time. The sky is the limit, you can create things that don't exist anywhere else! DesignLab Circuit Library Drawing circuits can only accomplish so much without a library of circuits (known as cores) to do the heavy lifting. Our goal is to provide the framework for anyone to write a core that can be wired into a circuit. We want to seek out the best open source circuits on the interwebs and convert them to a dead simple schematic library. The internet is absolutely full of open source circuits; just take a look at sites like OpenCores.com. You will find everything from classic audio chips to stepper motor controllers. All of these amazing circuits are within our reach when converted to schematic form and included with DesignLab IDE! -
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- FPGA
- Logic Analyzer
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An LCD driver for the most common lcd controller to be used in fpgas and not only ... Check out the project and code here!!
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Me and a partner created a version of the classic Space invaders arcade game in a Zedboard FPGA 100 % in Verilog. Check out the project and code here !!
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I have heard about this FPGA company. They have two development boards yet they are not open source. So my question is: Can anyone please make a open source non-volatile FPGA board? http://www.gowinsemi.com.cn/en/kaifa.aspx
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Hi, I'm writing a serial SRAM-interface between AVR and the SRAM available to the FPGA. Aim is to learn VHDL/FPGA programming so I'm not taking easiest route here. But I have a problem! I now have a small program on the AVR-side that transmits ones and zeroes to the fpga at a very low rate (say one per second now during debug). I'm using the MOSI-pin for this. When switching from 0 to 1 I detect _one_ rising edge on the fpga (by tracking value from last clock and current clock and looking for a 0->1 transition). When switching from 1 to 0 I detect _multiple_ rising edges on the fpga. There should be none. My question is if the AVR outputs correct nice digital signals that are interpreted as ones and zeros on the fpga, or do I need to process them somehow? Is there something special about the MOSI pin? All my VHDL programs looks fine during simulation so now I'm looking at other external factors. My VHDL program is still under suspicion of course! Thanksful for any help I can get!
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Version 2.3.0
13,198 downloads
ZAP IDE has been replaced by the easier to use DesignLab IDE which integrates schematic based circuits with Arduino style code. Please download the latest DesignLab IDE files for the latest Papilio software. ZAP (ZPUino Arduino Papilio) IDE is specially designed to get you up and running quickly with Soft Processors on the Papilio FPGA boards. It has everything needed to start running sketches on the AVR8 and ZPUino Soft Processors in a single download. Based on the Arduino IDE (1.5.2) and specially modified for Soft Processor based System on Chip designs. Supports: ZPUino Soft ProcessorVersion 1.0 Version 2.0 (experimental) [*]AVR8 Soft Processor More Info: ZAP IDE QuickStart ZPUino User Guide Soft Processor Tutorials Soft Processor Reference Versions: Once you go to the download section you will see different files to download, the files marked with expert do not include a java jre and are a little smaller to download. If you already have a compatible jre you can try downloading the expert version, but for a hassle free experience we recommend downloading the larger version that has everything included. -
note: Solved, the problem might have been related to having the incorrect board selected. Hi, I'm trying to communicate between the AVR (hard core) processor and the fpga. I've verified that AVR works. I can do serial, blink LED 13 etc, blink LEDs on my breadboard etc. However I'm having troubles "connecting" one of the AVR-compatible pins to a FPGA-pin. Would be happy for any help I could get! I'll be happy to make a tutorial/example once I figure all of this out Details: I'm opening a pin (using pinMode) on the AVR side as an output. I'm accessing that same pin in my ISE schematics and just routing it to an output (say Arduino_40). I've tried different pins (with 0-14 as output from AVR and all the CH-wing pins as outputs). My schematics has no zpuino, all there is what you can see from ise.png plus the AVR disable/enable bit. In order to route an input directly to an output I had a to make a really simple VHDL-snippet that just routes the value. See breakin_passthrough.vhdl. The problem might be in me misunderstanding how this is supposed to work. Sidenote: I'm avoiding wishbone since it relies on zpuino and I want the SRAM all to myself in the fpga. In my sketch I do void setup() { pinMode(13, OUTPUT);} and in loop I do void loop() { digitalWrite(13, HIGH); delay(500); digitalWrite(13, LOW); delay(500); } I've chosen 13 so I can see the LED blink when it is running, but I've tried other ones as well. Thanks again! ps. See this thread http://forum.gadgetfactory.net/index.php?/topic/2415-communication-zpuinofpga/for a discussion on what I'm trying to do and why I want to avoid the zpuino for now.breakin_passthrough.vhd
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Hi! I've just recently received my DUO board and I have some beginners questions! First let me say that I'm super happy with it so good work everyone! Falling importance! 1) I've successfully done some zpuino stuff as well as some fpga stuff. I'm looking for a real simple way to communicate between zpuino and fpga. For now I would be happy if the zpuino could set a bit (when all init is ready) and then I could access it in my ISE schematics somehow. If this was running on the AVR I would go via an external pin, but that feels wrong now that I'm completely in fpga land! I've read a little about the wishbone concept but I was hoping I could postpone using it for a little bit. I mostly want simple internal GPIO. Am I missing something simple? 2) I've used malloc to grab a SRAM-memory block in the zpuino. I was wondering if there was a function get a block located at a certain place? I would want to use it to make sure that the zpuino never uses the memory. Something like. unsigned char *a = (unsigned char*)placed_malloc(position, size); That way I can _assume_ where my memory is located at, and the zpuino can malloc as much as it wants without stealing my memory. 3) Is there a way to connect an input directly to an output in an ISE schematics editor? Are there symbols that represent logic high / logic low? Thanks!
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253 downloads
Learn VHDL with Mike Field's free book written specifically for the Papilio and LogicStart MegaWing. Step by step examples and full source code walks you through using all the peripherals on the LogicStart. Mike Field wrote a great ebook to help beginners learn VHDL and FPGA technology. We asked Mike what would be the perfect hardware for his proposed book and the end result was the LogicStart MegaWing! Find all code examples on the ebook's github repository. Wiki page with more material that pre-dates the book. Github page -
Version 1.0
1,744 downloads
Build your own custom ZPUino System on Chip design using the Schematic editor! Just drag and drop the wishbone peripherals you want to design a ZPUino Soft Processor with exactly what you want and then program it with the ZAP IDE. Note: This works under Linux but there are bugs with the schematic editor that give mixed results. -
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- Papilio
- eagle files
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- Papilio One
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